Kevin Harer

Synopsys (Switzerland) — Switzerland

Computer Science · Physical Sciences

4h-index163citations7works0.02yr avg
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Research Topics

Formal Methods in Verification(5), Low-power high-performance VLSI design(3), Embedded Systems Design Techniques(3), Logic, programming, and type systems(2), Software Testing and Debugging Techniques(2)

Publications7 total

POWER-TRUCTOR: An Integrated Tool Flow for Formal Verification and Coverage of Architectural Power Intent
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems·2013· 13 cited
Formal methods for coverage analysis of architectural power states in power-managed designs
2012· 4 cited
Learning from Constraints for Formal Property Checking
Journal of Electronic Testing·2010
Learning from constraints for formal property checking
2009
Supporting sequential assumptions in hybrid verification
2005· 5 cited
A robust solution to the timing convergence problem in high-performance design
2003· 16 cited
Smart simulation using collaborative formal and simulation engines
International Conference on Computer Aided Design·2000· 125 cited

Frequent Co-authors

Robert Damiano(2), Aritra Hazra(2), Pallab Dasgupta(2), Ansuman Banerjee(2), In-Ho Moon(2), Pei Hsin Ho(1), Thomas R. Shiple(1), James Kukula(1), Valeria Bertacco(1), Jerry Taylor(1), Jiang Long(1), Narendra Shenoy(1), Mahesh A. Iyer(1), Hi-Keung Ma(1), P. Thilking(1), Rajdeep Mukherjee(1), Ajit Pal(1), Subhankar Mukherjee(1), E Cerný(1), Ashvin Dsouza(1)