Wangqi Qiu

Mentor Technologies — United States

Computer Science · Physical Sciences

11h-index531citations17works0.02yr avg
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Research Topics

VLSI and Analog Circuit Testing(16), Integrated Circuits and Semiconductor Failure Analysis(14), Low-power high-performance VLSI design(7), VLSI and FPGA Design Techniques(6), Radiation Effects in Electronics(4)

Publications17 total

Macro Model of Advanced Devices for Parasitic Extraction
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems·2016· 4 cited
Comparison of Delay Tests on Silicon
Proceedings/Proceedings - International Test Conference·2006· 7 cited
A vector-based approach for power supply noise analysis in test compaction
2006· 38 cited
A circuit level fault model for resistive shorts of MOS gate oxide
2006· 11 cited
Fault simulation and test generation for small delay faults
2006
Longest-path selection for delay test under process variation
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems·2005· 50 cited
Static Compaction of Delay Tests Considering Power Supply Noise
2005· 29 cited
Longest path selection for delay test under process variation
ASP-DAC 2004: Asia and South Pacific Design Automation Conference 2004 (IEEE Cat. No.04EX753)·2004· 21 cited
An efficient algorithm for finding the k longest testable paths through each gate in a combinational circuit
2004· 120 cited
Testing the path delay faults of ISCAS85 circuit c6288
2004· 13 cited
PARADE: parametric delay evaluation under process variation [IC modeling]
2004· 6 cited
Longest path selection for delay test under process variation
Asia and South Pacific Design Automation Conference·2004· 30 cited
Minimum moment Steiner trees
Symposium on Discrete Algorithms·2004· 6 cited
K longest paths per gate (KLPG) test generation for scan-based sequential circuits
2004· 116 cited
A statistical fault coverage metric for realistic path delay faults
2004· 31 cited
A circuit level fault model for resistive bridges
ACM Transactions on Design Automation of Electronic Systems·2003· 40 cited
CodSim - a combined delay fault simulator
2003· 9 cited

Frequent Co-authors

D.M.H. Walker(12), Xiang Lü(11), Weiping Shi(11), Jing Wang(2), Zhuo Li(2), Ziding Yue(2), D V Rama Koti Reddy(1), Zhuo Li(1), H. Balachandran(1), Zhuo Li(1), Jing Wang(1), Weiping Shi(1), Zhuo Li(1), Jing Wang(1), S. Fancler(1), D.M.H. Walker(1), Z. Li(1), Zhuo Li(1), Zhuo Li(1), M.H. Walker(1)