Krishnendu Chakrabarty

Techno India Group (India) — India

Computer Science · Physical Sciences

80h-index31.2kcitations1.4kworks1.72yr avg
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Research Topics

VLSI and Analog Circuit Testing(471), Integrated Circuits and Semiconductor Failure Analysis(414), Electrowetting and Microfluidic Technologies(369), Microfluidic and Capillary Electrophoresis Applications(188), Modular Robots and Swarm Intelligence(174)

Publications1.4k total

List of contributors
Elsevier eBooks·2026
DiabLLM: An LLM-Based Framework for Blood Glucose Prediction in Type 1 Diabetes
IEEE Journal of Biomedical and Health Informatics·2026
Chemical composition and properties of aquatic food industry waste
Elsevier eBooks·2026
STAMP-2.5D: Structural and Thermal Aware Methodology for Placement in 2.5D Integration
2025Open Access
Real-Time Stress Monitoring with Flexible Electronics: A Co-Design Approach from ADCs to Feature Extractors and Classifiers
2025Open Access
Prompt, Fab, Flex: Agentic LLMs for Flexible Electronics Design
2025· 1 cited
Runtime Fault Localization in Deep Neural Network Accelerators
ACM Transactions on Design Automation of Electronic Systems·2025Open Access
Design Automation Techniques for Microfluidic Fully Programmable Valve Array Biochips: A Systematic Survey
ACM Transactions on Design Automation of Electronic Systems·2025
Detecting Partial Sample Forgery in DNA Forensics Using Molecular Barcoding on Digital Microfluidic Biochips
Journal of Hardware and Systems Security·2025· 1 cited
FeTest: Defect Analysis and March Test Solution for FeFETs <sup>*</sup>
2025
Fault Tolerance in RRAM-based AI Accelerator with Guided Randomized Activation
2025
OCTANE: On-Chip Telemetry-based Anomaly Notification Engine
2025
TIDE: Telemetry-Informed Delay Testing for Silent Data Corruption <sup>*</sup>
2025
Fault Modeling and Testing of Chiplet-to-Chiplet Interconnects in Fan-out Wafer-Level Packaging <sup>*</sup>
2025
NeuralTPG: GPU-Accelerated Neural Twin-Based Test Pattern Generation for Transition Delay Faults in Safety-Critical Applications
2025
LLM-Aided In-Field Workload Generation for Detecting Silent Data Corruptions at Scale
2025
SMART: Scalable and Modular Architecture for Routing-Aware Testing of Fan-out Wafer-Level Packages <sup>*</sup>
2025
Patchability-Driven Design Exploration for System-on-Chip Patching Architectures
ACM Transactions on Design Automation of Electronic Systems·2025Open Access
COMET-3D: Compute-in-Memory-Based Transformer Accelerator With Optimized Pipeline and 3D Heterogeneous Integration
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems·2025· 2 cited
GINA: Exploiting Graph Neural Network Layer Features for Energy Efficient Inferencing in NVM-based PIM Accelerators
ACM Transactions on Embedded Computing Systems·2025Open Access
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Frequent Co-authors

Fei Su(7), Hairong Qi(5), Erik Jan Marinissen(5), Anshuman Chandra(5), V. Iyengar(5), S. Sitharama Iyengar(3), Yi Zou(3), S.S. Dhillon(2), Soumitro Banerjee(2), G. A. Leveille(2), Lixue Xia(2), Yu Wang(2), Yisheng Zou(1), S. S. Iyengar(1), Eungchun Cho(1), Yi Zou(1), Mark G. Karpovsky(1), Lev B. Levitin(1), Vikram Iyengar(1), Hsien-Hsin S. Lee(1)