Donald Yeung

University of Maryland, College Park — United States

Computer Science · Physical Sciences

24h-index2.3kcitations94works1.02yr avg
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Research Topics

Parallel Computing and Optimization Techniques(76), Advanced Data Storage Technologies(43), Interconnection Networks and Systems(32), Distributed systems and fault tolerance(19), Radiation Effects in Electronics(14)

Publications94 total

MORSE: Memory Overwrite Time Guided Soft Writes to Improve ReRAM Energy and Endurance
2024· 1 cited
Critical Issues in Advanced ReRAM Development
Proceedings of the International Symposium on Memory Systems·2023
Monolithically Integrating Non-Volatile Main Memory over the Last-Level Cache
ACM Transactions on Architecture and Code Optimization·2021· 8 citedOpen Access
Pipelined CPU-GPU Scheduling for Caches
2021Open Access
Tileable Monolithic ReRAM Memory Design
2020· 2 cited
Nested MIMD-SIMD Parallelization for Heterogeneous Microprocessors
ACM Transactions on Architecture and Code Optimization·2019· 7 citedOpen Access
Design for ReRAM-based main-memory architectures
Proceedings of the International Symposium on Memory Systems·2019· 14 citedOpen Access
Analyzing the Monolithic Integration of a ReRAM-Based Main Memory Into a CPU's Die
IEEE Micro·2019· 3 cited
Design and Evaluation of Monolithic Computers Implemented Using Crossbar ReRAM
2019Open Access
Advanced Microprocessor Architectures
2018
Memory-systems challenges in realizing monolithic computers
Proceedings of the International Symposium on Memory Systems·2018· 8 cited
Optimizing locality in graph computations using reuse distance profiles
2017· 3 cited
Using Multicore Reuse Distance to Study Coherence Directories
ACM Transactions on Computer Systems·2017· 2 cited
Guiding Locality Optimizations for Graph Computations via Reuse Distance Analysis
IEEE Computer Architecture Letters·2017· 4 cited
Multi-cache resizing via greedy coordinate descent
The Journal of Supercomputing·2016· 1 cited
Reducing data movement with approximate computing techniques
2016· 3 cited
Identifying Power-Efficient Multicore Cache Hierarchies via Reuse Distance Analysis
ACM Transactions on Computer Systems·2016· 12 citedOpen Access
Exploiting Multi-Loop Parallelism on Heterogeneous Microprocessors
Digital Repository at the University of Maryland (University of Maryland College Park)·2016Open Access
Unlocking the True Potential of 3-D CPUs With Microfluidic Cooling
IEEE Transactions on Very Large Scale Integration (VLSI) Systems·2015· 17 cited
Design Space Exploration of 3D CPUs and Micro-Fluidic Heatsinks With Thermo-Electrical-Physical Co-Optimization
2015· 8 cited
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Frequent Co-authors

Anant Agarwal(12), Dong-Keun Kim(8), Seungryul Choi(7), John Kubiatowicz(6), David Kranz(5), Beng-Hong Lim(5), Bruce Jacob(4), Meng-Ju Wu(4), Minshu Zhao(4), Ricardo Bianchini(3), David Chaiken(3), Kirk L. Johnson(3), Kenneth MacKenzie(3), Chau‐Wen Tseng(3), Xuanhua Li(3), Nicholas Kohout(3), Caleb Serafy(3), Ankur Srivastava(3), Meenatchi Jagasivamani(3), Candace Walden(3)