Taeyoung Chung

Yonsei University — South Korea

Engineering · Physical Sciences

12h-index480citations45works0.02yr avg
OpenAlex↗ORCID↗Google Scholar↗Lab page↗

Accepting Students?

No reports yet. Know if this professor is taking students?

Research Topics

Semiconductor materials and devices(22), Advancements in Semiconductor Devices and Circuit Design(21), 3D IC and TSV technologies(7), Integrated Circuits and Semiconductor Failure Analysis(7), Copper Interconnects and Reliability(6)

Publications45 total

SSAT: Self-Supervised Associating Network for Multiobject Tracking
IEEE Transactions on Circuits and Systems for Video Technology·2022· 10 cited
A 10A/μs Fast Transient AOT Voltage Regulator on DDR5 DIMM with Dithered Pseudo-Constant Switching Frequency Achieving -6dB Harmonic Suppression
2021· 2 cited
Optimized Ultralow-Power Amplifier for OOK Transmitter With Shaped Voltage Drive
IEEE Transactions on Microwave Theory and Techniques·2016· 6 cited
A Wideband CMOS Noise-Canceling Low-Noise Amplifier With High Linearity
IEEE Microwave and Wireless Components Letters·2015· 49 cited
Widely Tunable Variable Capacitor With Switching and Latching Mechanisms
IEEE Electron Device Letters·2014· 15 cited
FDQM: Fast Quality Metric for Depth Maps Without View Synthesis
IEEE Transactions on Circuits and Systems for Video Technology·2014· 8 cited
A Wideband Differential Low-Noise-Amplifier With IM3 Harmonics and Noise Canceling
IEEE Microwave and Wireless Components Letters·2014· 50 cited
Development of a flexible three-axis tactile sensor based on screen-printed carbon nanotube-polymer composite
Journal of Micromechanics and Microengineering·2014· 99 cited
Variable capacitor with switching mechanism for wide tuning range
2014
Better Theology, Better Space: Incorporating Feminist Characteristics in Church Architecture
Theology and Mission·2013Open Access
A RF CMOS band-pass tracking filter with enhanced Q and high linearity
Asia-Pacific Microwave Conference·2011· 2 cited
The non-bipartite integral graphs with spectral radius three
Linear Algebra and its Applications·2011· 4 citedOpen Access
High Density Copper Bump Technology Integrated With Wafer Level Package
ECS Transactions·2008· 2 cited
A novel method to analyze and design a NWL scheme DRAM
2008· 4 cited
Fully Integrated 56 nm DRAM Technology for 1 Gb DRAM
2007· 13 cited
Fabrication and Electrical Properties of Local Damascene FinFET Cell Array in Sub-60㎚ Feature Sized DRAM
JSTS Journal of Semiconductor Technology and Science·2006· 8 cited
A novel thin BOX SOI technology using bulk Si wafer for system-on-chip (SoC) application
Symposium on VLSI Technology·2006· 2 cited
Characteristics of sub 5nm tri-gate nanowire MOSFETs with single and poly Si channels in SOI structure
2006· 18 cited
Local-damascene-finFET DRAM integration with p/sup +/ doped poly-silicon gate technology for sub-60nm device generations
2005· 12 cited
Cryo Power and Heat Transfer
2004
page 1 of 3Next →

Frequent Co-authors

Kinam Kim(14), G.H. Koh(6), S.H. Lee(6), Dong-il Bae(6), Daewon Ha(5), Hongsik Jeong(5), J. H. Oh(5), Dong-Hwa Kwak(5), Changhyun Cho(4), Hankyu Lee(4), Bumman Kim(4), Soo-Ho Shin(4), Yeoun Sook Chun(4), Min‐Ook Kim(3), Jongbaeg Kim(3), Daechul Jeong(3), Dong-Won Shin(3), Kinam Kim(3), Jeong‐Whan Lee(3), Sung‐Hee Han(3)