Behzad Zeinali

Engineering · Physical Sciences

9h-index222citations17works0.02yr avg
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Research Topics

Advancements in Semiconductor Devices and Circuit Design(8), Semiconductor materials and devices(7), Magnetic properties of thin films(6), Advanced Memory and Neural Computing(5), Low-power high-performance VLSI design(4)

Publications17 total

Spin-Orbit-Torque-based Devices, Circuits and Architectures
arXiv (Cornell University)·2019· 11 citedOpen Access
A Reduced Store/Restore Energy MRAM-Based SRAM Cell for a Non-Volatile Dynamically Reconfigurable FPGA
IEEE Transactions on Circuits & Systems II Express Briefs·2018· 16 cited
Sensing of Spintronic Memories
2018· 4 cited
Ultra-Fast SOT-MRAM Cell with STT Current for Deterministic Switching
2017· 21 cited
Multilevel SOT-MRAM cell with a novel sensing scheme for high-density memory applications
2017· 9 cited
Progressive Scaled STT-RAM for Approximate Computing in Multimedia Applications
IEEE Transactions on Circuits & Systems II Express Briefs·2017· 28 cited
Quasi-Schottky-Barrier UTBB SOI MOSFET for Low-Power Robust SRAMs
IEEE Transactions on Electron Devices·2017· 4 cited
Ultra-Low Power Memory Design in Scaled Technology Nodes
2017
低電力ロバスト性SRAMのための準Schottky障壁UTBB SOI MOSFET【Powered by NICT】
IEEE Transactions on Electron Devices·2017
A Novel Nondestructive Bit-Line Discharging Scheme for Deep Submicrometer STT-RAMs
IEEE Transactions on Emerging Topics in Computing·2016· 11 cited
Low‐leakage sub‐threshold 9 T‐SRAM cell in 14‐nm FinFET technology
International Journal of Circuit Theory and Applications·2016· 23 cited
Low Power Design for Future Wearable and Implantable Devices
Journal of Low Power Electronics and Applications·2016· 40 citedOpen Access
A Novel Nondestructive Bit-Line Discharging Scheme for Deep Submicrometer STT-RAM
2016
Sub-Threshold SRAM Design in 14 Nm FinFET Technology with Improved Access Time and Leakage Power
2015· 12 cited
8T-SRAM cell with Improved Read and Write Margins in 65 nm CMOS Technology
IFIP advances in information and communication technology·2015· 7 citedOpen Access
Equalization-Based Digital Background Calibration Technique for Pipelined ADCs
IEEE Transactions on Very Large Scale Integration (VLSI) Systems·2013· 33 cited
A new digital background correction algorithm with non-precision calibration signals for pipelined ADCs
2011· 3 cited

Frequent Co-authors

Farshad Moradi(14), Jens Kargaard Madsen(8), Praveen Raghavan(5), Hamdam Ghanatian(3), Mohammad Tohidi(2), Mohammad Yavari(2), Katrine Lundager(1), Jens Kristian Madsen(1), Tohid Moosazadeh(1), Á. Rodríguez‐Vázquez(1), Dimitrios Karsinos(1), Leila Bagheriye(1), Siroos Toofan(1), Roghayeh Saeidi(1), Hooman Farkhani(1), Johan Pelloux-Prayer(1), Tim Böhnert(1), Mohammad Zahedinejad(1), Hadi Heidari(1), Vahid Nabaei(1)