Chua‐Chin Wang

National Sun Yat-sen University — Taiwan

Engineering · Physical Sciences

24h-index2.9kcitations432works0.92yr avg
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Research Topics

Analog and Mixed-Signal Circuit Design(136), Low-power high-performance VLSI design(110), Advancements in Semiconductor Devices and Circuit Design(91), Advancements in PLL and VCO Technologies(80), Semiconductor materials and devices(50)

Publications432 total

Application of Deep Learning in Underwater Image Processing
Journal of Marine Science and Engineering·2025Open Access
A 49.23% Power Reduction Active Gate Driver with Digital Multi-level Power Gating Control
Journal of Circuits Systems and Computers·2025· 1 cited
A 24.9% Power Reduction Active Gate Driver With Power Gating and Current Modulation for Power MOSFETs
IEEE Transactions on Circuits & Systems II Express Briefs·2025· 1 cited
A 10-Bit 100 MS/s $\mathrm{V}_{\text{CM}}$-Based Switching Analog-to-Digital Converter for PNN Systems
2025· 2 cited
A 5 $\mathrm{V}_{\text{pp}}$ 10-Bit $100\ \text{MS} / \mathrm{s}$ Current-Steering DAC as MZM Drivers of PNN Systems
2025· 2 cited
Up To 99.6 % duty cycle digital PWM using 180-nm CMOS process
Microelectronics Journal·2025
12-bit 100 MS/s Time-Relaxed Interleaved Randomly Selected DAC for Real-time FOG Systems
2025· 1 cited
A 12-bit Current-Steering DAC with Output Impedance Compensation for PNN Prototyping
2025· 2 cited
A Dual-Loop Clock and Data Recovery System with HLD for Extended Lock-in Range Demand
2025· 1 cited
Power-Effective TIA Design for PNN-Based AI Edges
2025
A 4.447 mW at 100 MHz and 49.62% Uniqueness XNOR–XOR RO PUF ASIC Using 180-nm CMOS Process for IoT Security Applications
IEEE Transactions on Very Large Scale Integration (VLSI) Systems·2025· 1 cited
A Low-Power 10-bit 72 MS/s Continuous Successive-Approximation Analog-to-Digital Converter
2025
Photonic parallel convolutional processing based on spectrum slicing on silicon photonics platform
2025
A High Sensitive Nanomaterial Coated Side Polished Fiber Sensor for Detection of Cardiac Troponin I Antibody
IEEE Transactions on NanoBioscience·2025· 1 cited
An on-chip temperature sensor with 0.5 °C resolution and 0.34% linearity error using 180-nm CMOS process
Integration·2025
A Power-Efficient 0.5668 TOPS/W Digital Logic Accelerator Implemented Using 40-nm CMOS Process for Underwater Object Recognition Usage
IEEE Access·2025Open Access
A 155 V/ns-CMTI On-chip Digital Multi-Layer Coreless Transformer-Based Isolated Gate Driver Using 0.18-µm HV CMOS Process
SSRN Electronic Journal·2025Open Access
A Power Transistor Active Gate Driver With Two-Level Miller Plateau Detection and Driving Device Equalization Using 180-nm HV BCD Process
IEEE Open Journal of Circuits and Systems·2025Open Access
A 75.5 TOPS/W High Area Efficiency Computing-in-Memory Based on Single-Ended 4-kb SRAM Using 16-nm FinFET Technology
SSRN Electronic Journal·2025Open Access
Active Gate Driver Design Using Differential Timing-based Miller Detector for Power MOSFET
2024· 2 cited
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Frequent Co-authors

Tzung-Je Lee(7), Chi‐Chun Huang(6), Ching‐Li Lee(5), Yih-Long Tseng(5), Chih–Peng Li(4), Chih-Lin Chen(4), Ron Hu(4), Gang-Neng Sung(4), Doron Shmilovitz(3), Chia-Hao Hsu(3), Chenn‐Jung Huang(3), Yan-Jhih Ciou(3), Chi-Feng Wu(3), Jianming Huang(3), Chun-Ying Juan(3), Shaul Ozeri(2), Jianming Huang(2), Chi-Chun Huang(2), U-Fat Chio(2), Po-Ming Lee(2)