Sharad Malik

Princeton University — United States

Computer Science · Physical Sciences

65h-index21.0kcitations418works0.32yr avg
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Research Topics

Parallel Computing and Optimization Techniques(156), Embedded Systems Design Techniques(144), Formal Methods in Verification(130), VLSI and Analog Circuit Testing(87), Low-power high-performance VLSI design(71)

Publications418 total

Perancangan Sistem Informasi Absensi QR Code dengan Metode Prototype Pada Smp Raudlatul Hikmah
Journal Innovation In Education·2025Open Access
FLAG: Formal and LLM-assisted SVA Generation for Formal Specifications of On-Chip Communication Protocols
arXiv (Cornell University)·2025Open Access
Hierarchical Formal Verification of Hardware
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems·2025
RTL Verification for Secure Speculation Using Contract Shadow Logic
2025· 1 citedOpen Access
Automatic Generation of Cycle-Accurate Timing Models from RTL for Hardware Accelerators
2024Open Access
Automatic Verification and Identification of Partial Retention Register Sets for Low-Power Designs
2024Open Access
Formal Verification for Secure Processors: A Guide for Computer Architects
Computer·2024
RTL Verification for Secure Speculation Using Contract Shadow Logic
arXiv (Cornell University)·2024· 1 citedOpen Access
Exact Scheduling to Minimize Off-Chip Data Movement for Deep Learning Accelerators
2024· 1 cited
Application-level Validation of Accelerator Designs Using a Formal Software/Hardware Interface
ACM Transactions on Design Automation of Electronic Systems·2023· 5 cited
Combined Scheduling, Memory Allocation and Tensor Replacement for Minimizing Off-Chip Data Accesses of DNN Accelerators
arXiv (Cornell University)·2023Open Access
Security Verification of Low-Trust Architectures
2023· 3 citedOpen Access
SoC Protocol Implementation Verification Using Instruction-Level Abstraction Specifications
ACM Transactions on Design Automation of Electronic Systems·2023· 1 citedOpen Access
INVITED: Generalizing the ISA to the ILA: A Software/Hardware Interface for Accelerator-rich Platforms
2023· 1 cited
CNNFlow: Memory-driven Data Flow Optimization for Convolutional Neural Networks
ACM Transactions on Design Automation of Electronic Systems·2022· 5 citedOpen Access
Usage-Based RTL Subsetting for Hardware Accelerators
Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design·2022Open Access
Compositional Verification Using a Formal Component and Interface Specification
Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design·2022· 2 citedOpen Access
ADA, the Center for Applications Driving Architectures: accomplishments and vision forward
Proceedings of the 59th ACM/IEEE Design Automation Conference·2022
Automatic Generation of Architecture-Level Models from RTL Designs for Processors and Accelerators
2022 Design, Automation & Test in Europe Conference & Exhibition (DATE)·2022· 7 cited
Application-Level Validation of Accelerator Designs Using a Formal Software/Hardware Interface
arXiv (Cornell University)·2022Open Access
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Frequent Co-authors

Lintao Zhang(8), Vivek Tiwari(6), Hangsheng Wang(6), Li-Shiuan Peh(6), Margaret Martonosi(5), A. Wolfe(4), Pramod Subramanyan(4), Yau-Tsun Steven Li(4), Kurt Keutzer(4), Robert K. Brayton(3), Andrew Wolfe(3), Mike Tien-Chien Lee(3), Somnath Ghosh(3), Srinivas Devadas(3), Pranav Ashar(3), Sayak Ray(2), Xinping Zhu(2), Alberto Sangiovanni‐Vincentelli(2), C.F. Madigan(2), Zhaohui Fu(2)