A. Paschalis

National and Kapodistrian University of Athens — Greece

Computer Science · Physical Sciences

29h-index2.5kcitations153works9.02yr avg
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Research Topics

VLSI and Analog Circuit Testing(116), Radiation Effects in Electronics(67), Integrated Circuits and Semiconductor Failure Analysis(64), Low-power high-performance VLSI design(36), Embedded Systems Design Techniques(15)

Publications153 total

A Parallel Architecture and Implementation for Near-Lossless Hyperspectral Image Compression Based on CCSDS 123.0-B-2 With Scalable Data-Rate Performance
IEEE Transactions on Very Large Scale Integration (VLSI) Systems·2024· 9 cited
High-Performance Hardware Accelerators for Next Generation On-Board Data Processing
2022· 4 cited
Scalable data-rate near-lossless hyperspectral image compression based on parallel implementation of CCSDS-123.0-B-2
Zenodo (CERN European Organization for Nuclear Research)·2022Open Access
A Hardware Implementation of CCSDS 122.1-B-1 for Transformed-Based Lossy Multispectral and Hyperspectral Image Compression
Zenodo (CERN European Organization for Nuclear Research)·2022Open Access
An Efficient Architecture and High-Throughput Implementation of CCSDS-123.0-B-2 Hybrid Entropy Coder Targeting Space-Grade SRAM FPGA Technology
IEEE Transactions on Aerospace and Electronic Systems·2022· 9 citedOpen Access
Immunogenic Cell Death, DAMPs and Prothymosin α as a Putative Anticancer Immune Response Biomarker
Cells·2022· 81 citedOpen Access
Efficient Hardware Architectures and Implementations of Packet-Level Erasure Coding Schemes for High Data Rate Reliable Satellite Communications
IEEE Transactions on Aerospace and Electronic Systems·2021· 5 cited
Efficient LDPC Encoder Designs for Magnetic Recording Media
2020
High-Performance COTS FPGA SoC for Parallel Hyperspectral Image Compression With CCSDS-123.0-B-1
IEEE Transactions on Very Large Scale Integration (VLSI) Systems·2020· 31 cited
Efficient Architectures for Multigigabit CCSDS LDPC Encoders
IEEE Transactions on Very Large Scale Integration (VLSI) Systems·2020· 31 cited
Analyzing the Resilience to SEUs of an Image Data Compression Core in a COTS SRAM FPGA
2019· 6 cited
A 3.3 Gbps CCSDS 123.0-B-1 Multispectral & Hyperspectral Image Compression Hardware Accelerator on a Space-Grade SRAM FPGA
IEEE Transactions on Emerging Topics in Computing·2018· 44 cited
Development of ASPIICS: a coronagraph based on Proba-3 formation flying mission
Space Telescopes and Instrumentation 2018: Optical, Infrared, and Millimeter Wave·2018· 28 cited
Application-Specific Solutions
2017· 2 cited
Recent achievements on ASPIICS, an externally occulted coronagraph for PROBA-3
Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE·2016· 12 cited
An efficient LDPC encoder architecture for space applications
2016· 24 cited
Design status of ASPIICS, an externally occulted coronagraph for PROBA-3
Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE·2015· 35 cited
A single chip dependable and adaptable payload Data Processing Unit
2015· 1 cited
Efficient field-programmable gate array implementation of CCSDS 121.0-B-2 lossless data compression algorithm for image compression
Journal of Applied Remote Sensing·2015· 9 cited
Software-Based Self-Test for Small Caches in Microprocessors
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems·2014· 22 cited
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Frequent Co-authors

Dimitris Gizopoulos(34), N. Kranitis(22), Y. Zorian(14), Mihalis Psarakis(11), Ioannis Voyiatzis(8), C. Halatsis(8), D. Nikolos(5), M. Hatzimihail(4), G. Xenoulis(3), Andreas Merentitis(3), Antonis Tsigkanos(3), А. Бемпорад(3), I. Cernica(3), François Denis(3), Lieve De Vos(3), Silvano Fineschi(3), Rafał Graczyk(3), Radek Melich(3), Dominique Mollet(3), M. Mosdorf(3)