Takuya Yoshihara

Kyushu University — Japan

Engineering · Physical Sciences

10h-index314citations34works0.02yr avg
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Research Topics

Semiconductor materials and devices(13), Semiconductor materials and interfaces(7), Advancements in Semiconductor Devices and Circuit Design(6), Metal and Thin Film Mechanics(4), Advancements in Photolithography Techniques(4)

Publications34 total

Study for Material Injection into Lipid Bilayer Using Electrically-induced Bubbles
The Proceedings of JSME annual Conference on Robotics and Mechatronics (Robomec)·2024
Grasping position estimation method using depth image for thin objects
2022
Design and Emulation of All-Digital Phase-Locked Loop on FPGA
Electronics·2019· 15 citedOpen Access
Evaluating Programmed Artificial Insemination for Cattle Production
International Journal of Advanced Computer Science and Applications·2019Open Access
Network interoperability trial with multi-vendor OTU4 interfaces carrying 100 Gigabit Ethernet signals
2012
Feasibility study on power consumption control of desalination plant with mechanical restrictions
2011· 2 cited
112Gb/s optical transponder with PM-QPSK and coherent detection employing parallel FPGA-based real-time digital signal processing, FEC and 100GbE Ethernet interface
2010· 14 cited
Dual workfunction Ni-silicide/HfSiON gate stacks by phase-controlled full-sificidation (PC-FUSI) technique for 45nm-node LSTP and LOP devices
2005· 57 cited
High-Mobility Dual Metal Gate MOS Transistors with High-k Gate Dielectrics
Japanese Journal of Applied Physics·2005· 17 cited
Fully Silicided NiSi Gate Electrodes on HfSiON Gate Dielectrics for Low-Power Applications
Japanese Journal of Applied Physics·2005· 5 cited
Formation of Nickel Self-Aligned Silicide by Using Cyclic Deposition Method
Japanese Journal of Applied Physics·2005· 2 cited
High Mobility Dual Metal Gate MOS Transistors with High-k Gate Dielectrics
2004· 4 cited
Formation of Nickel Self-Aligned Silicide by Using Cyclic Deposition Method
2004· 1 cited
Fully Silicided NiSi Gates on HfSiON Gate Dielectrics for Low Power Application
2004
A 600-MHz 54×54-bit multiplier with rectangular-styled Wallace tree
IEEE Journal of Solid-State Circuits·2001· 50 cited
High-performance embedded SOI DRAM architecture for the low-power supply
IEEE Journal of Solid-State Circuits·2000· 2 cited
A 3.6-Gb/s 340-mW 16:1 pipe-lined multiplexer using 0.18 /spl mu/m SOI-CMOS technology
IEEE Journal of Solid-State Circuits·2000· 8 cited
Properties of sputtered TaGe as an x-ray absorber material
Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE·1999
Properties of sputtered TaReGe used as an x-ray mask absorber material
Journal of Vacuum Science & Technology B Microelectronics and Nanometer Structures Processing Measurement and Phenomena·1998· 5 cited
Low-stress sputtered chromium–nitride hardmasks for x-ray mask fabrication
Journal of Vacuum Science & Technology B Microelectronics and Nanometer Structures Processing Measurement and Phenomena·1997· 13 cited
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Frequent Co-authors

Katsumi Suzuki(8), Kenzo Manabe(6), Taeko Ikarashi(5), Heiji Watanabe(5), Setsu Kotsuji(4), Kensuke Takahashi(4), A. Morioka(4), Toru Tatsumi(4), Shinji Tsuboi(4), Nobuyuki Ikarashi(3), Kiyoshi Fujii(3), Kazutami Arimoto(2), K. Fujishima(2), Takuro Tajima(2), Yuusuke Tanaka(2), Koichi Terashima(2), Yoshinao Miura(2), Makiko Oshida(2), Masayasu Tanaka(2), Hitoshi Wakabayashi(2)