Raymond R. Hoare

Computer Science · Physical Sciences

11h-index394citations33works0.02yr avg
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Research Topics

Parallel Computing and Optimization Techniques(17), Interconnection Networks and Systems(16), Embedded Systems Design Techniques(15), RFID technology advancements(7), Energy Harvesting in Wireless Networks(5)

Publications33 total

Deep Delay Loop Reservoir Computing for Specific Emitter Identification
arXiv (Cornell University)·2020· 6 citedOpen Access
Design Automation for RFID Tags and Systems
2017
Accelerating SAR processing on COTS FPGA hardware using C-to-gates design tools
2014· 2 cited
A two-stage hardware scheduler combining greedy and optimal scheduling
Journal of Parallel and Distributed Computing·2008· 1 cited
Radio frequency identification prototyping
ACM Transactions on Design Automation of Electronic Systems·2008· 9 cited
A CAM-based intrusion detection system for single-packet attack detection
Proceedings - IEEE International Parallel and Distributed Processing Symposium·2008· 6 cited
Design Automation for RFID Tags and Systems
2008· 3 cited
Linking Compilation and Visualization for Massively Parallel Programs
2007
A VLIW Processor With Hardware Functions: Increasing Performance While Reducing Power
IEEE Transactions on Circuits and Systems II Analog and Digital Signal Processing·2006· 13 cited
A Near-optimal Real-time Hardware Scheduler for Large Cardinality Crossbar Switches
2006· 6 cited
Level-wise Scheduling Algorithm for Fat Tree Interconnection Networks
2006· 10 cited
Reducing power while increasing performance with supercisc
ACM Transactions on Embedded Computing Systems·2006· 26 cited
A Low-Energy Reconfigurable Fabric for the SuperCISC Architecture
Journal of Low Power Electronics·2006· 17 cited
Technology mapping for Field Programmable Gate Arrays using Content-Addressable Memory (CAM)
Microprocessors and Microsystems·2006
Speech silicon AM: an FPGA-based acoustic modeling pipeline for hidden Markov model based speech recognition
International Parallel and Distributed Processing Symposium·2006· 3 cited
An automated, FPGA-based reconfigurable, low-power RFID tag
Microprocessors and Microsystems·2006· 40 cited
A Low-Energy Reconfigurable Fabric for the SuperCISC Architecture
2006· 2 cited
A Field Programmable RFID Tag and Associated Design Flow
2006· 16 cited
Rapid VLIW Processor Customization for Signal Processing Applications Using Combinational Hardware Functions
EURASIP Journal on Advances in Signal Processing·2006· 46 citedOpen Access
Speech Silicon: An FPGA Architecture for Real-Time Hidden Markov-Model-Based Speech Recognition
EURASIP Journal on Embedded Systems·2006· 14 citedOpen Access
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Frequent Co-authors

Alex K. Jones(23), Shenchih Tung(8), Swapna Dontharaju(7), J.T. Cain(7), Marlin H. Mickle(7), Zhu Ding(7), Dara Kusic(4), Gayatri Mehta(4), Josh Fazekas(4), Rami Melhem(4), Joshua Fazekas(3), John M. Foster(3), Ralph Sprang(3), Justin Stander(3), Jeffrey William Schuster(2), Kshitij Gupta(2), Peter J. Hawrylak(2), Henry G. Dietz(2), Joshua M. Lucas(2), M.L. McCloud(1)