E.S. Kuh

University of California, Berkeley — United States

Engineering · Physical Sciences

43h-index7.2kcitations182works0.02yr avg
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Research Topics

VLSI and FPGA Design Techniques(100), Low-power high-performance VLSI design(74), VLSI and Analog Circuit Testing(39), Interconnection Networks and Systems(36), Electromagnetic Compatibility and Noise Suppression(19)

Publications182 total

Analysis and Optimization of Low-Power Passive Equalizers for CPU–Memory Links
IEEE Transactions on Components Packaging and Manufacturing Technology·2011· 6 cited
Professor Ernest Kuh's talk
2011
Design methodology of high performance on-chip global interconnect using terminated transmission-line
2009· 13 cited
Desig nMethodolog yo fHig hPerformanc eOn-Chi pGloba lInterconnect Using Terminated Transmission-Line
2009
High performance on-chip differential signaling using passive compensation for global communication
2009· 14 cited
Efficient and accurate eye diagram prediction for high speed signaling
International Conference on Computer Aided Design·2008· 36 cited
Efficient and accurate eye diagram prediction for high speed signaling
2008· 41 cited
On-chip bus signaling using passive compensation
2008· 3 cited
Low power passive equalizer optimization using tritonic step response
2008· 8 cited
Low Power Passive Equalizer Design for Computer Memory Links
2008· 10 cited
Two-Stage Newton–Raphson Method for Transistor-Level Simulation
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems·2007· 12 cited
Two-stage newton–raphson method for transistor-level simulation
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems·2007· 1 cited
An unconditional stable general operator splitting method for transistor level
Asia and South Pacific Conference on Design Automation, 2006.·2006
An unconditional stable general operator splitting method for transistor level transient analysis
2006· 7 cited
Single-row routing and extensions
2005
One-dimensional logic gate assignment and interval graphs
2005· 3 cited
A New Accurate and Efficient Timing Simulator
2005· 2 cited
Efficient transient simulation for transistor-level analysis
2005· 4 cited
Accurate reduced RL model for frequency dependent transmission lines
2003· 2 cited
The Chebyshev expansion based passive model for distributed interconnect networks
1999 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (Cat. No.99CH37051)·2003· 4 cited
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Frequent Co-authors

Chung‐Kuan Cheng(5), T. Fujisawa(5), Tianxiong Xue(4), Shide Lin(3), M.A.B. Jackson(3), A. Srinivasan(3), K. Chaudhary(3), Tomi Ohtsuki(3), Qingjian Yu(3), Xianlong Hong(3), R.A. Rohrer(2), Ren‐Song Tsay(2), Ming‐Jeh Chien(2), Toshinobu Kashiwabara(2), Isao Shirakawa(2), Tom Xue(2), D. Wang(2), Jin H. Huang(2), Malgorzata Marek-Sadowska(2), C. Desoer(1)