C. Fernando

Texas Instruments (United States) — United States

Engineering · Physical Sciences

10h-index1.8kcitations16works0.02yr avg
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Research Topics

Radio Frequency Integrated Circuit Design(14), Advancements in PLL and VCO Technologies(13), Semiconductor Lasers and Optical Devices(5), Microwave Engineering and Waveguides(3), Analog and Mixed-Signal Circuit Design(3)

Publications16 total

9.1 A 45nm CMOS RF-to-Bits LTE/WCDMA FDD/TDD 2×2 MIMO base-station transceiver SoC with 200MHz RF bandwidth
2016· 20 cited
A parametric study of equiangular spiral antenna (arm type)
2009· 2 cited
A low-cost quad-band single-chip GSM/GPRS radio in 90nm digital CMOS
2009· 10 cited
A 24mm<sup>2</sup> Quad-Band Single-Chip GSM Radio with Transmitter Calibration in 90nm Digital CMOS
2008· 62 cited
An Efficient Technique for Performance Analysis of a Receiver in the Presence of Calibration/Compensation Algorithms
Digest of papers - IEEE Radio Frequency Integrated Circuits Symposium·2007
The First Fully Integrated Quad-Band GSM/GPRS Receiver in a 90-nm Digital CMOS Process
IEEE Journal of Solid-State Circuits·2006· 112 cited
A GSM/GPRS Receiver front-end with discrete-time filters in a 90nm Digital CMOS
2006· 7 cited
A discrete time quad-band GSM/GPRS receiver in a 90nm digital CMOS process
2006· 45 cited
All-digital PLL and transmitter for mobile phones
IEEE Journal of Solid-State Circuits·2005· 619 cited
A 1.8dB NF Receiver front-end for GSM/GPRS in a 90nm Digital CMOS
2005· 1 cited
All-digital PLL and GSM/edge transmitter in 90nm CMOS
2005· 143 cited
Event-driven Simulation and modeling of phase noise of an RF oscillator
IEEE Transactions on Circuits and Systems I Fundamental Theory and Applications·2005· 130 cited
All-digital TX frequency synthesizer and discrete-time receiver for Bluetooth radio in 130-nm CMOS
IEEE Journal of Solid-State Circuits·2004· 560 cited
Event-driven simulation and modeling of an RF oscillator
2004· 7 cited
A discrete-time Bluetooth receiver in a 0.13μm digital CMOS process
2004· 111 cited
Development and first-phase experimental prototype validation of a single-chip hybrid and reconfligurable multiprocessor signal processor system
2004· 3 cited

Frequent Co-authors

Robert Bogdan Staszewski(21), Chih-Ming Hung(10), K. Maggio(10), Dirk Leipold(10), J. Wallberg(9), P. Cruise(8), K. Muhammad(8), S. Vemulapalli(6), T. Jung(6), I. Deng(6), Oren Eliezer(5), Y.-C. Ho(4), T. Mayhugh(4), I. Elahi(4), Shawn D. Larson(4), Thomas W Murphy(4), S. Rezeq(3), N. Barton(3), Meng-Chang Lee(3), Mitch Entezari(3)