Arun Joseph

IBM (India) — India

Computer Science · Physical Sciences

9h-index519citations30works2.02yr avg
OpenAlex↗ORCID↗Google Scholar↗Lab page↗

Accepting Students?

No reports yet. Know if this professor is taking students?

Research Topics

VLSI and Analog Circuit Testing(10), Advancements in Semiconductor Devices and Circuit Design(9), Low-power high-performance VLSI design(7), Embedded Systems Design Techniques(7), Parallel Computing and Optimization Techniques(5)

Publications30 total

Efficient Aspect Verification and Debugging of High-Performance Microprocessor Designs
IEEE Design and Test·2024· 2 cited
Digital twins and their use in future power systems
Digital Twin·2022· 81 citedOpen Access
Guest Editors’ Introduction: Special Issue on Benchmarking Machine Learning Systems and Applications
IEEE Design and Test·2022Open Access
A Survey on Machine Learning Accelerators and Evolutionary Hardware Platforms
IEEE Design and Test·2022· 44 cited
Digital twins and their use in future power systems
Digital Twin·2021· 43 citedOpen Access
Application and Thermal-reliability-aware Reinforcement Learning Based Multi-core Power Management
ACM Journal on Emerging Technologies in Computing Systems·2019· 32 cited
Heterogeneity aware power abstractions for dynamic power dominated FinFET‐based microprocessors
IET Computers & Digital Techniques·2019· 2 citedOpen Access
Heterogeneity Aware Power Abstraction for Hierarchical Power Analysis
2019· 2 cited
Predictive Mitigation of Short Term Voltage Instability Using a Faster Than Real-Time Digital Replica
2018· 15 cited
An Under Voltage Load Shedding Scheme Based on a Short Term Voltage Instability Detection Method
2018
Applied Cosimulation of Intelligent Power Systems: Implementing Hybrid Simulators for Complex Power Systems
IEEE Industrial Electronics Magazine·2017· 71 citedOpen Access
Cosimulation of Intelligent Power Systems: Fundamentals, Software Architecture, Numerics, and Coupling
IEEE Industrial Electronics Magazine·2017· 156 cited
FVCAG
2016· 1 cited
FreqLeak: A frequency step based method for efficient leakage power characterization in a system
2015
Virtual logic netlist: Enabling efficient RTL analysis
2015· 2 cited
FirmLeak: A Framework for Efficient and Accurate Runtime Estimation of Leakage Power by Firmware
2015· 2 cited
Empirically derived abstractions in uncore power modeling for a server-class processor chip
2014· 6 cited
Performance analysis and optimization of radio over fiber link
2014· 17 cited
Process Synchronization in Multi-core Systems Using On-Chip Memories
2014· 3 cited
Efficient PVT independent abstraction of large IP blocks for hierarchical power analysis
2013 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)·2013· 14 cited
page 1 of 2Next →

Frequent Co-authors

Hans G. Kerkhoff(9), Peter Pálenský(6), Spandana Rachamalla(6), A. Haridass(4), Sai Manoj Pudukotai Dinakarrao(3), Nagu Dhanwada(3), Rahul Rao(3), A. van der Meer(2), Claudio David López(2), Kaikai Pan(2), Miloš Cvetković(2), Digvijay Gusain(2), Amlan Ganguly(2), Anand Haridass(2), S. Heuvelmans(2), Marcel H.H. Weusthof(2), Charles Lefurgy(2), Sreekanth Pai(2), S. N. S. Reddy(2), Sathwika Bavikadi(1)