Stefan Cosemans

IMEC — Belgium

Engineering · Physical Sciences

24h-index1.6kcitations96works10.02yr avg
OpenAlex↗Google Scholar↗Lab page↗

Accepting Students?

No reports yet. Know if this professor is taking students?

Research Topics

Semiconductor materials and devices(51), Advanced Memory and Neural Computing(42), Ferroelectric and Negative Capacitance Devices(38), Advancements in Semiconductor Devices and Circuit Design(29), Low-power high-performance VLSI design(24)

Publications95 total

Extremely Scaled Perpendicular SOT-MRAM Array Integration on 300mm Wafer
2024· 5 cited
11.3 Metis AIPU: A 12nm 15TOPS/W 209.6TOPS SoC for Cost- and Energy-Efficient Inference at the Edge
2024· 15 cited
A 2Mbit Digital in-Memory Computing Matrix-Vector Multiplier for DNN Inference supporting flexible bit precision and matrix size achieving 612 binary TOPS/W
2023· 17 citedOpen Access
Evaluating the Effects of FeFET Device Variability on Charge Sharing Based AiMC Accelerator
2023
Demonstration of multilevel multiply accumulate operations for AiMC using engineered a-IGZO transistors-based 2T1C gain cell arrays
2023· 11 citedOpen Access
Dynamic Quantization Range Control for Analog-in-Memory Neural Networks Acceleration
ACM Transactions on Design Automation of Electronic Systems·2022· 9 citedOpen Access
DIANA: An End-to-End Energy-Efficient Digital and ANAlog Hybrid Neural Network SoC
2022 IEEE International Solid- State Circuits Conference (ISSCC)·2022· 77 cited
Analog In-Memory Computing with SOT-MRAM: Architecture and Circuit Challenges
2022
The Complementary FET (CFET) 6T-SRAM
IEEE Transactions on Electron Devices·2021· 37 cited
A Comprehensive Study of Nanosheet and Forksheet SRAM for Beyond N5 Node
IEEE Transactions on Electron Devices·2021· 50 cited
Charge Sharing and Charge Injection A/D Converters for Analog In-Memory Computing
2021· 12 cited
Multi-pillar SOT-MRAM for Accurate Analog in-Memory DNN Inference
Symposium on VLSI Technology·2021· 9 cited
STT-MRAM array performance improvement through optimization of Ion Beam Etch and MTJ for Last-Level Cache application
2021· 24 cited
Design-Technology Space Exploration for Energy Efficient AiMC-Based Inference Acceleration
2021· 8 cited
OxRRAM-Based Analog in-Memory Computing for Deep Neural Network Inference: A Conductance Variability Study
IEEE Transactions on Electron Devices·2021· 13 cited
A 22 nm, 1540 TOP/s/W, 12.1 TOP/s/mm<sup>2</sup> in-Memory Analog Matrix-Vector-Multiplier for DNN Acceleration
2021· 39 cited
Edge-induced reliability &amp; performance degradation in STT-MRAM: an etch engineering solution
2021· 7 cited
Analog-to-Digital Converter Design Exploration for Compute-in-Memory Accelerators
IEEE Design and Test·2021· 61 citedOpen Access
Opportunities and Limitations of Emerging Analog in-Memory Compute DNN Architectures
2020· 25 citedOpen Access
IGZO-Based Compute Cell for Analog In-Memory Computing—DTCO Analysis to Enable Ultralow-Power AI at Edge
IEEE Transactions on Electron Devices·2020· 28 cited
page 1 of 5Next →

Frequent Co-authors

Wim Dehaene(19), Francky Catthoor(19), Peter Debacker(12), Diederik Verkest(12), G. Groeseneken(11), M. Jurczak(11), B. Govoreanu(10), Dirk J. Wouters(10), Ioannis A. Papistas(10), Gouri Sankar Kar(9), Jonas Doevenspeck(8), Pieter Weckx(8), R. Degraeve(7), Leqi Zhang(6), Innocent Agbo(6), Mottaqiallah Taouil(6), Said Hamdioui(6), A. Fantini(5), Sergiu Clima(5), L. Goux(5)