Yusuke Matsushita

Kyoto University — Japan

Computer Science · Physical Sciences

5h-index125citations18works1.02yr avg
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Research Topics

Logic, programming, and type systems(5), Formal Methods in Verification(4), Interconnection Networks and Systems(4), Embedded Systems Design Techniques(4), Parallel Computing and Optimization Techniques(3)

Publications18 total

Nola: Later-Free Ghost State for Verifying Termination in Iris
Proceedings of the ACM on Programming Languages·2025· 1 citedOpen Access
Borrowable Fractional Ownership Types for Verification
Lecture notes in computer science·2023· 3 cited
Borrowable Fractional Ownership Types for Verification
arXiv (Cornell University)·2023· 1 citedOpen Access
RustHornBelt: a semantic foundation for functional verification of Rust programs with unsafe code
2022· 39 citedOpen Access
RustHorn: CHC-based Verification for Rust Programs
ACM Transactions on Programming Languages and Systems·2021· 48 citedOpen Access
RustHorn: CHC-based Verification for Rust Programs
2021· 5 cited
Demonstration of Low Power Stream Processing Using a Variable Pipelined CGRA
2019· 1 cited
Low Power Stream Processing on a Variable Pipelined Accelerator CCSOTB2
IEICE Technical Report; IEICE Tech. Rep.·2018
Escalator Network for a 3D Chip Stack with Inductive Coupling ThruChip Interface
International Journal of Networking and Computing·2018· 5 citedOpen Access
A shared memory chip for twin-tower of chips
IEICE Technical Report; IEICE Tech. Rep.·2017· 3 cited
Multi-objective Optimization for Application Mapping and Body Bias Control on a CGRA
2017· 2 cited
Power Reduction for Pipelined CGRA with the Controlling Variable Pipeline and the Body Bias Voltage
IEICE Technical Report; IEICE Tech. Rep.·2017
Body Bias Domain Partitioning Size Exploration for a Coarse Grained Reconfigurable Accelerator
IEICE Transactions on Information and Systems·2017Open Access
Vertical Packet Switching Elevator Network Using Inductive Coupling ThruChip Interface
2016· 2 cited
Body bias grain size exploration for a coarse grained reconfigurable accelerator
2016· 14 cited
Power Optimization of a Reconfigurable Accelerator by Middle-grained Body Bias Control
IEICE Technical Report; IEICE Tech. Rep.·2016
Ultra Low Power Reconfigurable Accelerator CC-SOTB2
IEICE Technical Report; IEICE Tech. Rep.·2015· 1 cited
Development of a New Steel Erection System - WASCOR Research Project Report (Part 3)
Proceedings of the ... ISARC·1989

Frequent Co-authors

Hideharu Amano(11), Hayate Okuhara(8), Naoki Ando(5), Masuyama Koichiro(4), Takeshi Tsukada(3), Naoki Kobayashi(3), Yu Fujita(3), Takuya Kojima(3), Ryuta Kawano(2), Akio Nomura(2), Junichiro Kadomoto(2), Hiroki Matsutani(2), Tadahiro Kuroda(2), Ken Sakayori(2), Ryosuke Sato(2), Xavier Denis(1), Jacques-Henri Jourdan(1), Derek Dreyer(1), Naoki Kobayashi(1), Takashi Nakayama(1)