Tejas Krishnamohan

Stanford University — United States

Engineering · Physical Sciences

25h-index3.3kcitations76works0.02yr avg
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Research Topics

Semiconductor materials and devices(64), Advancements in Semiconductor Devices and Circuit Design(61), Nanowire Synthesis and Applications(30), Integrated Circuits and Semiconductor Failure Analysis(10), Semiconductor materials and interfaces(8)

Publications76 total

Schottky-Barrier CNFET
HubZero·2015Open Access
InxGa1-xSb channel p-metal-oxide-semiconductor field effect transistors: Effect of strain and heterostructure design
Journal of Applied Physics·2011· 38 cited
The Effect of Donor/Acceptor Nature of Interface Traps on Ge MOSFET Characteristics
IEEE Transactions on Electron Devices·2011· 66 cited
Development of High-k Dielectric for Antimonides and a sub 350 degree Celsius III-V pMOSFET Outperforming Germanium
2010· 3 cited
Development of high-k dielectric for antimonides and a sub 350°C III–V pMOSFET outperforming Germanium
2010· 35 cited
High-Mobility Ge N-MOSFETs and Mobility Degradation Mechanisms
IEEE Transactions on Electron Devices·2010· 97 cited
Novel SiGe Source/Drain for Reduced Parasitic Resistance in Ge NMOS
ECS Transactions·2010· 8 cited
Optimal design of III–V heterostructure MOSFETs
2010· 4 cited
Novel SiGe Source/Drain for Reduced Parasitic Resistance in Ge NMOS
ECS Meeting Abstracts·2010· 1 citedOpen Access
Effect of interfacial oxide on Ge MOSCAP and N-MOSFET characteristics
Microelectronic Engineering·2010· 8 cited
Properties and Trade-Offs of Compound Semiconductor MOSFETs
2010· 4 cited
Characteristics of surface states and charge neutrality level in Ge
Applied Physics Letters·2009· 46 cited
Experimental demonstration of high mobility Ge NMOS
2009· 57 cited
Investigation of ballistic current in scaled Floating-gate NAND FLASH and a solution
2009· 28 cited
Engineering of strained III–V heterostructures for high hole mobility
2009· 19 cited
Investigation of Strained-Sb Hetrostructures with High Hole Mobility
2009· 1 cited
Hole Mobility and Its Enhancement with Strain for Technologically Relevant III-V Semiconductors
2009· 14 cited
High mobility SiGe shell-Si core omega gate pFETS
2009· 3 cited
3D Simulation Study of Cell-Cell Interference in Advanced NAND Flash Memory
2009· 21 cited
Multi-Layer High-K Tunnel Barrier for a Voltage Scaled NAND-Type Flash Cell
2009· 4 cited
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Frequent Co-authors

Krishna C. Saraswat(43), Duygu Kuzum(11), Abhijit Pethe(11), Yoshio Nishi(11), H.‐S. Philip Wong(10), Donghyun Kim(9), Christoph Jungemann(8), Yun Sun(6), Aneesh Nainani(6), Paul C. McIntyre(5), P. Pianetta(5), Shyam Raghunathan(4), Chi On Chui(4), Ken Uchida(4), Yasuhiro Oshima(3), Zoran Krivokapić(3), Arash Hazeghi(3), B. R. Bennett(3), J.B. Boos(3), Mario G. Ancona(3)