Walid Najjar

University of California, Riverside — United States

Computer Science · Physical Sciences

34h-index4.3kcitations200works0.02yr avg
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Research Topics

Parallel Computing and Optimization Techniques(112), Embedded Systems Design Techniques(82), Interconnection Networks and Systems(61), Distributed and Parallel Computing Systems(24), Advanced Data Storage Technologies(20)

Publications200 total

First Twenty Years of the International Symposium on Applied Reconfigurable Computing (ARC): A Selection of Papers
Lecture notes in computer science·2025
Acceleration of Parallel-Blocked QR Decomposition of Tall-and-Skinny Matrices on FPGAs
ACM Transactions on Architecture and Code Optimization·2021· 3 citedOpen Access
Efficient local locking for massively multithreaded in-memory hash-based operators
The VLDB Journal·2021· 2 citedOpen Access
High-Performance Parallel Radix Sort on FPGA
2020· 8 cited
Field Programmable Gate Arrays for Enhancing the Speed and Energy Efficiency of Quantum Dynamics Simulations
Journal of Chemical Theory and Computation·2020· 31 citedOpen Access
Efficient main-memory top-K selection for multicore architectures
Proceedings of the VLDB Endowment·2019· 7 cited
PDES-A
ACM Transactions on Modeling and Computer Simulation·2019· 7 citedOpen Access
Accelerating In-Memory Database Selections Using Latency Masking Hardware Threads
ACM Transactions on Architecture and Code Optimization·2019· 3 citedOpen Access
Heterogeneous Acceleration of HAR Applications
IEEE Transactions on Circuits and Systems for Video Technology·2019· 7 cited
GPU Accelerated Top-K Selection With Efficient Early Stopping.
Very Large Data Bases·2019· 1 cited
Massively parallel skyline computation for processing-in-memory architectures
2018· 22 citedOpen Access
Mapping a Single Assignment Programming Language to Reconfigurable Systems
eScholarship (California Digital Library)·2017· 2 citedOpen Access
PDES-A
2017· 10 cited
Optimizing hardware design for Human Action Recognition
2016· 9 citedOpen Access
Preface
2016Open Access
FPGA-accelerated group-by aggregation using synchronizing caches
2016· 16 citedOpen Access
ROCCC 2.0
2016· 4 cited
CAMs as Synchronizing Caches for Multithreaded Irregular Applications on FPGAs
International Conference on Computer Aided Design·2015· 6 cited
CAMs as synchronizing caches for multithreaded irregular applications on FPGAs
2015 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)·2015· 4 cited
High-Level Language Tools for Reconfigurable Computing
Proceedings of the IEEE·2015· 65 citedOpen Access
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Frequent Co-authors

Frank Vahid(12), W. Böhm(8), Chuanjun Zhang(6), Jason Villarreal(6), Zhi Guo(6), J. Hammes(6), Bruce A. Draper(5), Robert Rinker(5), M. Chawathe(5), Betul Buyukkurt(5), Vassilis J. Tsotras(5), Demetrios Zeinalipour-Yazti(4), Vana Kalogeraki(4), Dimitrios Gunopulos(4), Charles A. Ross(4), Fadi Kurdahi(4), Dinesh C. Suresh(4), Greg Stitt(4), Edward B. Fernandez(4), Stefano Lonardi(4)