Howard Mao

UCLA Medical Center — United States

Computer Science · Physical Sciences

9h-index743citations17works0.02yr avg
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Research Topics

Parallel Computing and Optimization Techniques(7), Embedded Systems Design Techniques(5), Interconnection Networks and Systems(4), Muscle Physiology and Disorders(3), Advanced Memory and Neural Computing(3)

Publications17 total

A Phase 2 Clinical Trial Evaluating the Safety and Efficacy of Delandistrogene Moxeparvovec (SRP-9001) in Patients with Duchenne Muscular Dystrophy (DMD) (S48.004)
Neurology·2023· 7 cited
eP201: A phase 2 clinical trial evaluating the safety and efficacy of delandistrogene moxeparvovec for treating patients with Duchenne muscular dystrophy
Genetics in Medicine·2022
Gemmini: Enabling Systematic Deep-Learning Architecture Evaluation via Full-Stack Integration
2021· 16 citedOpen Access
A Multicenter Randomized, Double-Blind, Placebo-Controlled, Gene-Delivery Clinical Trial of rAAVrh74.MHCK7.micro-dystrophin for Duchenne Muscular Dystrophy (4478)
Neurology·2021· 3 cited
Invited: Chipyard - An Integrated SoC Research and Implementation Environment
2020· 12 cited
Chipyard: Integrated Design, Simulation, and Implementation Framework for Custom SoCs
IEEE Micro·2020· 318 cited
FirePerf
2020· 15 citedOpen Access
Programmable Fine-Grained Power Management and System Analysis of RISC-V Vector Processors in 28-nm FD-SOI
IEEE Solid-State Circuits Letters·2020· 5 cited
Gemmini: An Agile Systolic Array Generator Enabling Systematic Evaluations of Deep-Learning Architectures
arXiv (Cornell University)·2019· 52 citedOpen Access
Gemmini: Enabling Systematic Deep-Learning Architecture Evaluation via\n Full-Stack Integration
arXiv (Cornell University)·2019· 3 citedOpen Access
A Mixed-Signal RISC-V Signal Analysis SoC Generator With a 16-nm FinFET Instance
IEEE Journal of Solid-State Circuits·2019· 22 cited
FireSim: FPGA-Accelerated Cycle-Exact Scale-Out System Simulation in the Public Cloud
IEEE Micro·2019· 7 cited
FPGA Accelerated INDEL Realignment in the Cloud
2019· 40 cited
A Generated Multirate Signal Analysis RISC-V SoC in 16nm FinFET
2018· 7 cited
FireSim: FPGA-Accelerated Cycle-Exact Scale-Out System Simulation in the Public Cloud
2018· 212 cited
A 0.37mm<sup>2</sup> LTE/Wi-Fi compatible, memory-based, runtime-reconfigurable 2<sup>n</sup>3<sup>m</sup>5<sup>k</sup> FFT accelerator integrated with a RISC-V core in 16nm FinFET
2017· 8 cited
Vector Processors for Energy-Efficient Embedded Systems
2016· 16 cited

Frequent Co-authors

Borivoje Nikolić(12), Krste Asanović(11), Alon Amid(9), Colin Schmidt(9), Sagar Karandikar(7), Albert Ou(7), Jerry Zhao(6), John Wright(5), Jonathan Bachrach(5), David Biancolin(4), Harrison Liew(4), Nathan Pemberton(4), Paul Rigge(4), Yakun Sophia Shao(4), Daniel Grubb(3), Qijing Huang(3), Randy H. Katz(3), Ameer Haj-Ali(3), Vighnesh Iyer(3), Ion Stoica(3)