Benjamin Carrión Schäfer

The University of Texas at Dallas — United States

Computer Science · Physical Sciences

21h-index1.5kcitations133works0.52yr avg
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Research Topics

Embedded Systems Design Techniques(63), VLSI and Analog Circuit Testing(44), VLSI and FPGA Design Techniques(40), Parallel Computing and Optimization Techniques(37), Low-power high-performance VLSI design(35)

Publications133 total

From High-Level Synthesis Lite to High-Level Synthesis Full: Unlocking HLS tool Limitations
ACM Transactions on Design Automation of Electronic Systems·2025Open Access
EdgeGuard: Robust and Fault-Aware Design for Resilient Edge Computing AI Accelerators
2025Open Access
Improving the Quality of the High-Level Synthesis Estimation Results through Multi-Level Predictive Models
2025Open Access
Breaking Behavioral IPs Design Space Lock
2025
ADVISOR: Approximate Computing-frienDly High-LeVel Synthesis DesIgn Space ExplORer
2025
FREEDOM: FPGA-Based Hardware Redaction Emulator
2025
FPGA-Based Hardware Redaction Bitstream Fuzzing Attack
2025
HAMMER: Hardware-aware Runtime Program Execution Acceleration through runtime reconfigurable CGRAs
2025· 1 citedOpen Access
Making Legacy Hardware Robust against Side Channel Attacks via High-Level Synthesis
2025
Efficient and Secure Cloud-based Split Logic Synthesis
2025Open Access
Finding Bugs in RTL Descriptions: High-Level Synthesis to the Rescue
2024· 3 citedOpen Access
Investigating the Effect of Hyper-Parameter Settings on Simulated Annealing-Based High-Level Synthesis Design Space Exploration
2024
VeriPy: A Python-Powered Framework for Parsing Verilog HDL and High-Level Behavioral Analysis of Hardware
2024· 3 cited
MOSAIC: Maximizing ResOurce Sharing in Behavioral Application SpecIfic ProCessors
Microprocessors and Microsystems·2024
PEPA: Performance Enhancement of Embedded Processors through HW Accelerator Resource Sharing
2023· 3 citedOpen Access
ADVICE: Automatic Design and Optimization of Behavioral Application Specific Processors
2023· 1 citedOpen Access
CERTIFY: AutomatiC MEasuRing The QualIty oF High-Level SYnthesis
2023
MANTIS: Machine Learning-Based Approximate ModeliNg of RedacTed Integrated CircuitS
2023· 5 cited
MIRROR: MaxImizing the Re-usability of RTL thrOugh RTL to C CompileR
2023· 3 cited
Approximating HW Accelerators through Partial Extractions onto Shared Artificial Neural Networks
Proceedings of the 28th Asia and South Pacific Design Automation Conference·2023· 1 cited
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Frequent Co-authors

Anushree Mahapatra(6), Kazutoshi Wakabayashi(6), Yiorgos Makris(5), Siyuan Xu(5), Nandeesha Veeranna(3), Jianqi Chen(3), Félix Moreno(3), Zi Wang(2), Shuangnan Liu(2), Mustafa Shihab(2), Jingxiang Tian(2), Gaurav Rajavendra Reddy(2), Bo Hu(2), W. H. Swartz(2), Carl Sechen(2), Andrew Chan(2), Zi Wang(2), Ashish Trambadia(2), David Aledo(2), Farah Naz Taher(2)