Ziran Zhu

Southeast University — China

Engineering · Physical Sciences

11h-index362citations52works0.82yr avg
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Research Topics

VLSI and FPGA Design Techniques(41), VLSI and Analog Circuit Testing(25), Low-power high-performance VLSI design(11), Advancements in Photolithography Techniques(11), Interconnection Networks and Systems(8)

Publications52 total

NaViL: Rethinking Scaling Properties of Native Multimodal Large Language Models under Data Constraints
arXiv (Cornell University)·2025Open Access
Late Breaking Results: Customized Diffusion Model Empowered by Heterogeneous Graph Network for Effective Floorplanning
2025
Comprehensive Placement and Routing Framework with Guaranteed In-Cell Routability for Synthesizing Complementary-FET Cells
2025
HDPlacer: A Hierarchy and Dataflow-Aware Macro Placer for Modern SoCs
2025
An Effective Fixed-Outline Floorplanning Algorithm for Rectilinear Soft Modules
2025
Routability-Driven Macro Placement Engine for Modern FPGAs With Complex Cascade Shape and Region Constraints
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems·2025· 2 cited
Multiscale Feature Attention and Transformer Based Congestion Prediction for Routability-Driven FPGA Macro Placement
2025
Dual Multimodal Fusions With Convolution and Transformer Layers for VLSI Congestion Prediction
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems·2024· 2 cited
Two stage Ordered Escape Routing combined with LP and heuristic algorithm for large scaled PCB
Integration·2024· 2 cited
A fast and high-performance global router with enhanced congestion control
Integration·2024
Subgraph matching-based reference placement for printed circuit board designs
The Journal of Supercomputing·2024· 1 cited
Late Breaking Results: Routability-Driven FPGA Macro Placement Considering Complex Cascade Shape and Region Constraints
2024· 1 cited
Subgraph Matching with Diversity Handling and Its Applications to PCB Placement
2024· 1 cited
Effective Legalization with Cell Version Replacement for Hybrid-Row-Height Circuit Designs
2024
LAMPlace: Legalization-Aided Reinforcement Learning-Based Macro Placement for Mixed-Size Designs With Preplaced Blocks
IEEE Transactions on Circuits & Systems II Express Briefs·2024· 3 cited
Variational Label-Correlation Enhancement for Congestion Prediction
2024· 1 cited
High-Performance Placement Engine for Modern Large-Scale FPGAs With Heterogeneity and Clock Constraints
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems·2023· 2 cited
An effective routability-driven packing algorithm for large-scale heterogeneous FPGAs
Integration·2023
High-Performance 3-D Placement Engine With Physical-Aware Incremental Partitioning
IEEE Transactions on Circuits & Systems II Express Briefs·2023· 6 cited
An Effective Routing Refinement Algorithm Based on Incremental Replacement and Rerouting
IEEE Transactions on Circuits & Systems II Express Briefs·2023
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Frequent Co-authors

Jianli Chen(27), Yao‐Wen Chang(15), Wenxing Zhu(12), Hao Gu(9), Huan He(7), Jun Yang(7), Keyu Peng(7), Zhipeng Huang(6), Yangjie Mei(5), Xiqiong Bai(5), Jian Gu(5), Qinghai Liu(4), Chuandong Chen(4), Jianli Chen(3), Xingquan Li(3), Zijun Li(3), Jun Yu(3), Miaodi Su(3), Youwen Wang(3), Xinglin Zheng(3)