Jianli Chen

Central South University — China

Engineering · Physical Sciences

16h-index797citations132works1.32yr avg
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Research Topics

VLSI and FPGA Design Techniques(72), VLSI and Analog Circuit Testing(48), 3D IC and TSV technologies(23), Advancements in Photolithography Techniques(22), Low-power high-performance VLSI design(18)

Publications132 total

3D DRC: Design Rule Checking for 3D IC with U-Net-based Non-Manhattan Optimization
2025
3D CoSim: Coupled Operator Learning-Based Co-Simulator for Transferable 3D-IC Analysis
2025
Obstacle-Avoiding X-Architecture Bounded-Skew Tree Algorithm Under Timing Slack Constraints
IEEE Transactions on Systems Man and Cybernetics Systems·2025
Vanadium migration and enrichment behavior during calcification roasting of vanadium-titanium magnetite: New insights based on the silicate phase
Separation and Purification Technology·2025
PSO-optimized dual-channel BP neural network for bathymetric prediction using multisource marine geodetic data: A case study of the gulf of Mexico
Science of Remote Sensing·2025Open Access
Effect of Calcium Sulfate and Silica Gel on Vanadium Leaching Characteristics from Vanadium Titanomagnetite via Calcification Roasting–Sulfuric Acid Leaching: Formation Mechanism and Process Enhancement
Metals·2025· 1 citedOpen Access
Vanadium extracted pellets desulfurization consolidation behavior and roasted pellets reduction characteristic: Performance and mechanism
Journal of environmental chemical engineering·2025· 1 cited
Study on coal-based solid state reduction of Panzhihua ilmenite
Minerals Engineering·2025
XShift: FPGA-efficient Binarized LLM with Joint Quantization and Sparsification
2025
Libra: A Hybrid-Sparse Attention Accelerator Featuring Multi-Level Workload Balance
2025
Legalization Framework with Design Rule Constraints Enhanced by Monte-Carlo-Based Cell Priority Optimization
2025
Multi-Bit Flip-Flop Based Timing and Power Optimization under Advanced Technology Nodes
2025
A Matching-Based Escape Routing Algorithm With Variable Design Rules and Multiple Constraints
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems·2025
Routability-Driven Macro Placement Engine for Modern FPGAs With Complex Cascade Shape and Region Constraints
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems·2025· 2 cited
FAMERS: An FPGA Accelerator for Memory-Efficient Edge-Rendered 3D Gaussian Splatting
2025· 1 cited
AttentionLib: A Scalable Optimization Framework for Automated Attention Acceleration on FPGA
2025· 1 cited
Study on Coal-Based Solid State Reduction of Panzhihua Ilmenite
SSRN Electronic Journal·2025Open Access
Dual Multimodal Fusions With Convolution and Transformer Layers for VLSI Congestion Prediction
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems·2024· 2 cited
An Extensible Legalization Framework for Multiple Physical Design Constraints
2024· 2 cited
Two stage Ordered Escape Routing combined with LP and heuristic algorithm for large scaled PCB
Integration·2024· 2 cited
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Frequent Co-authors

Wenxing Zhu(22), Yao‐Wen Chang(20), Ziran Zhu(13), Jun Yu(10), Zheng Peng(6), Peng Zou(6), Zhifeng Lin(6), Bei Yu(5), Xingquan Li(5), Qinghai Liu(4), Zhipeng Huang(3), Yueyin Bai(3), Hao Zhou(3), Keqing Zhao(3), Kun Wang(3), Jinwook Jung(3), Iris Hui-Ru Jiang(3), Shih‐Ting Lin(3), Yih-Lang Li(3), В. В. Кравец(3)