Donghyun Han

Yonsei University — South Korea

Engineering · Physical Sciences

4h-index59citations21works0.82yr avg
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Research Topics

3D IC and TSV technologies(12), Semiconductor materials and devices(8), VLSI and Analog Circuit Testing(8), Interconnection Networks and Systems(5), Additive Manufacturing and 3D Printing Technologies(4)

Publications21 total

Low Cost TSV Repair Architecture Using Switch-Based Matrix for Highly Clustered Faults
IEEE Access·2025Open Access
SPOT: Fast and Optimal Built-In Redundancy Analysis Using Smart Potential Case Collection
IEEE Transactions on Very Large Scale Integration (VLSI) Systems·2024· 1 cited
Signal Shifting-based Reusable Redundant TSV Structure for Infrastructure TSV
2024
TSV Built-In Self-Repair Architecture for Lifespan Reliability Enhancement of HBM
IEEE Transactions on Reliability·2024· 2 cited
LOTS: Low Overhead TSV Repair Method Using IEEE-1838 Standard Architecture
2023
TSV Built-In Self-Repair Architecture for Improving the Yield and Reliability of HBM
IEEE Transactions on Very Large Scale Integration (VLSI) Systems·2023· 8 cited
Novel Error-Tolerant Voltage-Divider-Based Through-Silicon-Via Test Architecture
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems·2022· 3 cited
Area Efficient Built-In Redundancy Analysis using Pre-Solutions with Various Spare Structure
2021
A Circular-based TSV Repair Architecture
2021· 3 cited
Hardware Efficient Built-in Self-test Architecture for Power and Ground TSVs in 3D IC
2021· 2 cited
Multibank Optimized Redundancy Analysis Using Efficient Fault Collection
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems·2021· 4 cited
Herringbone-Based TSV Architecture for Clustered Fault Repair and Aging Recovery
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems·2021· 10 cited
Effective Spare Line Allocation Built-in Redundancy Analysis With Base Common Spare for Yield Improvement of 3D Memory
IEEE Access·2021· 4 citedOpen Access
ECC-Aware Fast and Reliable Pattern Matching Redundancy Analysis for Highly Reliable Memory
IEEE Access·2021Open Access
Redundancy Analysis Optimization with Clustered Known Solutions for High Speed Repair
2020
W-ERA: One-Time Memory Repair with Wafer-Level Early Repair Analysis for Cost Reduction
2020· 1 cited
Redundancy Analysis based on Fault Distribution for Memory with Complex Spares
2019
Dynamic Built-In Redundancy Analysis for Memory Repair
IEEE Transactions on Very Large Scale Integration (VLSI) Systems·2019· 21 cited
3D Memory Formed of Unrepairable Memory Dice and Spare Layer
2018
A new repair scheme for TSV-based 3D memory using base die repair cells
2017
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Frequent Co-authors

Sungho Kang(18), Hayoung Lee(8), Youngkwang Lee(4), Seung‐Taek Lee(3), Ho-Gyeong Kim(3), Sooryeong Lee(3), Sunghoon Kim(3), Sungho Kang(2), Seokjun Jang(2), Sangmin Park(1), Minho Cheong(1), Duyeon Won(1), Dayoung Kim(1), Youngki Moon(1), Hyun-Ho Yoo(1), D K Kim(1), Donghyun Kim(1), Seungtaek Lee(1), Sang-Koo Kang(1), Chong-Yeal Kim(1)