Amir Nahir

IBM Research - Haifa — Israel

Computer Science · Physical Sciences

15h-index568citations47works0.02yr avg
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Research Topics

VLSI and Analog Circuit Testing(20), Radiation Effects in Electronics(18), Software Testing and Debugging Techniques(12), Embedded Systems Design Techniques(11), Distributed systems and fault tolerance(9)

Publications47 total

Post-Silicon Validation of the IBM POWER8 Processor
2018· 2 cited
Reversing the supermarket: A distributed approach for handling elasticity in the cloud
2016
Test Generation Methods for Utilization Improvement of Hardware-Accelerated Simulation Platforms
IEEE Design and Test·2016
Resource allocation and management in Cloud Computing
2015· 17 cited
Comparative study of test generation methods for simulation accelerators
Design, Automation, and Test in Europe·2015· 2 cited
Replication-Based Load Balancing
IEEE Transactions on Parallel and Distributed Systems·2015· 34 cited
Debugging post-silicon fails in the IBM POWER8 bring-up lab
IBM Journal of Research and Development·2015· 6 cited
Solutions to IBM POWER8 verification challenges
IBM Journal of Research and Development·2015· 9 cited
Comparative Study of Test Generation Methods for Simulation Accelerators
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2015·2015· 4 cited
Workload Factoring: A Game-Theoretic Perspective
IEEE/ACM Transactions on Networking·2014· 6 cited
Verification of Transactional Memory in POWER8
2014· 18 cited
Post-Silicon Validation of the IBM POWER8 Processor
2014· 22 cited
Effective post-silicon failure localization using dynamic program slicing
Design, Automation, and Test in Europe·2014· 7 cited
Effective post-silicon failure localization using dynamic program slicing
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2014·2014· 1 cited
Effective post-silicon failure localization using dynamic program slicing
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2014·2014· 2 cited
Dynamic Selection of Trace Signals for Post-Silicon Debug
2013· 17 cited
Hybrid checking for microarchitectural validation of microprocessor designs on acceleration platforms
International Conference on Computer Aided Design·2013· 2 cited
Hybrid checking for microarchitectural validation of microprocessor designs on acceleration platforms
2013 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)·2013· 1 cited
Topology Design of Communication Networks: A Game-Theoretic Perspective
IEEE/ACM Transactions on Networking·2013· 22 cited
Schedule first, manage later: Network-aware load balancing
2013· 6 cited
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Frequent Co-authors

Avi Ziv(13), Danny Raz(11), Vitali Sokhin(9), Ariel Orda(9), Wisam Kadry(8), Allon Adir(6), Arkadiy Morgenshtein(6), C. Meissner(5), John Schumann(4), Alan J. Hu(4), Valeria Bertacco(4), David Breitgand(4), Rami Cohen(4), Ronny Morad(4), Shimon Landa(3), Gil Shurek(3), Shakti Kapoor(3), Anatoly Koyfman(3), Biruk Mammo(3), Dimtry Krestyashyn(3)