Marcel Kossel

IBM Research - Zurich — Switzerland

Engineering · Physical Sciences

31h-index3.2kcitations131works3.72yr avg
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Research Topics

Advancements in PLL and VCO Technologies(67), Radio Frequency Integrated Circuit Design(45), Analog and Mixed-Signal Circuit Design(36), Photonic and Optical Devices(32), Semiconductor Lasers and Optical Devices(20)

Publications130 total

Cryogenic CMOS RF AWGs for qubit control
IEEE Open Journal of the Solid-State Circuits Society·2026Open Access
A 112-Gb/s Discrete Multitone Wireline Receiver Datapath With Time-Interleaved Time-Based ADC in 5-nm FinFET
IEEE Journal of Solid-State Circuits·2025· 1 cited
A 144 mW 76 Gb/s DAC-Based Discrete Multitone Wireline Transmitter in 5nm FinFET
2025· 1 cited
A 2-Lane DAC-/ADC-Based 2 × 2 MIMO PAM-4 MMSE-DFE Wireline Transceiver With FEXT Cancellation on RFSoC Platform
IEEE Transactions on Very Large Scale Integration (VLSI) Systems·2025· 3 cited
7.5 A 353mW 112Gb/s Discrete Multitone Wireline Receiver Datapath with Time-Based ADC in 5nm FinFET
2025· 4 cited
A NRZ/PAM4 SST TX in 5nm FinFET CMOS with 3-tap FFE and 0.7pJ/b efficiency at 100 Gb/s PAM4
2024
A 40 GS/s 8b-DAC SST-TX in 7 nm FinFET CMOS for cryogenic quantum applications with 32kB SRAMbased RF-DDS AWG
2024· 1 cited
A Discrete Multitone Wireline Transceiver Datapath With On-Chip Sign-Sign LMS Adaptation and Loading Profile Optimization on RFSoC
IEEE Transactions on Circuits & Systems II Express Briefs·2024· 6 cited
A Loop-Break Decision Feedback Equalizer for DAC/ADC-DSP-Based Wireline Transceivers
IEEE Transactions on Circuits and Systems I Regular Papers·2024· 10 cited
A 2-Lane Discrete Multitone Wireline Receiver Datapath With Far-End Crosstalk Cancellation on RFSoC Platform
IEEE Transactions on Circuits & Systems II Express Briefs·2024· 6 cited
A 4×4 MIMO Discrete Multitone Wireline Transceiver With Far-End Crosstalk Cancellation For ADC-Based High-Speed Serial Links
2024· 5 cited
A DAC/ADC-Based Wireline Transceiver Datapath Functional Verification on RFSoC Platform
IEEE Transactions on Circuits & Systems II Express Briefs·2024· 7 cited
Design of synchronous frequency dividers in 5‐nm FinFET CMOS technology
Electronics Letters·2023· 1 citedOpen Access
Design of Time-Encoded Spiking Neural Networks in 7-nm CMOS Technology
IEEE Transactions on Circuits & Systems II Express Briefs·2023· 7 cited
An 8b 1.0-to-1.25GS/s 0.7-to-0.8V Single-Stage Time-Based Gated-Ring-Oscillator ADC with $2\times$ Interpolating Sense-Amplifier-Latches
2023· 14 cited
An 8b 1.0-to-1.25 GS/s Time-Based ADC With Bipolar VTC and Sense Amplifier Latch Interpolated Gated Ring Oscillator TDC
IEEE Solid-State Circuits Letters·2023· 4 citedOpen Access
A 72-GS/s, 8-Bit DAC-Based Wireline Transmitter in 4-nm FinFET CMOS for 200+ Gb/s Serial Links
IEEE Journal of Solid-State Circuits·2022· 27 cited
A cryogenic SRAM based arbitrary waveform generator in 14 nm for spin qubit control
ESSCIRC 2022- IEEE 48th European Solid State Circuits Conference (ESSCIRC)·2022· 10 citedOpen Access
Cryogenic Characterization and Modeling of 14 nm Bulk FinFET Technology
Zenodo (CERN European Organization for Nuclear Research)·2022Open Access
An 8-bit 56GS/s 64x Time-Interleaved ADC with Bootstrapped Sampler and Class-AB Buffer in 4nm CMOS
2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)·2022· 23 cited
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Frequent Co-authors

Thomas Toifl(40), Christian Menolfi(39), Thomas Morf(39), Pier Andrea Francese(31), Lukas Kull(26), Matthias Brändli(17), Martin Schmatz(16), Matthias Bräendli(15), P. Buchmann(13), Danny Luu(13), Alessandro Cevrero(13), İlter Özkaya(13), Yusuf Leblebici(12), Toke Meyer Andersen(11), Mounir Meghelli(6), Hazar Yueksel(5), Jonas Weiß(4), H. Benedickter(4), Florian Krismer(4), Johann W. Kolar(4)