Depeng Sun

Xuzhou University of Technology — China

Engineering · Physical Sciences

8h-index233citations43works2.32yr avg
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Research Topics

Radio Frequency Integrated Circuit Design(18), Advancements in PLL and VCO Technologies(15), Photonic and Optical Devices(13), Tunneling and Rock Mechanics(12), Advanced machining processes and optimization(10)

Publications43 total

Design and analysis of a wideband low-fractional-spur, low-jitter Fractional-N digital PLL
Microelectronics Journal·2025
A linear chirp generator with 2nd DPD technique based on a Type-III SPLL
Microelectronics Journal·2025
A Low-Noise Class-F <sub>23</sub> VCO With Harmonic Resonance Expansion and 2nd/3rd-Harmonic Outputs for Multiband mm-Wave Applications
IEEE Transactions on Circuits and Systems I Regular Papers·2025
A 28–40 GHz 6-Bit Variable Gain Phase Shifter with &lt;0.4°/&lt;0.31 dB PS RMS Phase/Gain Errors and 31.5-dB Gain Tuning Range
2025
Design and analysis of an ultra-wideband quad-mode quad-core oscillator with mode ambiguity elimination
Microelectronics Journal·2025
Investigating multi-diamond grit interactions in sawing granitic rocks: crack propagation and material removal mechanisms
Journal of the Brazilian Society of Mechanical Sciences and Engineering·2025· 2 cited
A 28-GHz 36.75-fs<sub>rms</sub>-Jitter Single-Stage Differential Sampling PLL With Accelerated Slide Locking and Sampling Voltage Shift Technique
IEEE Transactions on Microwave Theory and Techniques·2025· 2 cited
19.11 A 13GHz Charge-Pump PLL Achieving $\mathbf{15.8}\mathbf{fs}_{\mathbf{rms}}$ Integrated Jitter and -98.5dBc Reference Spur
2025· 2 cited
A 0.0006-mm<sup>2</sup>, 0.13-pJ/bit, 9–21-Gb/s Sub-Sampling CDR With Inverter-Based Frequency Multiplier and Embedded 1:3 DEMUX in 65-nm CMOS
IEEE Journal of Solid-State Circuits·2025
Design and Analysis of a Wideband Low-Fractional-Spur, Low-Jitter Fractional-N Digital Pll
SSRN Electronic Journal·2025Open Access
A Linear Chirp Generator with 2nd Dpd Technique Based on a Type-Iii Spll
SSRN Electronic Journal·2025Open Access
Design and Analysis of an Ultra-Wideband Quad-Mode Quad-Core Oscillator with Mode Ambiguity Elimination
SSRN Electronic Journal·2025Open Access
A 7.4–9.2-GHz Fractional-N Differential Sampling PLL Based on Phase-Domain and Voltage-Domain Hybrid Calibration
IEEE Transactions on Very Large Scale Integration (VLSI) Systems·2024· 1 cited
A 0.0006-mm<sup>2</sup> 0.13-pJ/bit 9–21-Gb/s Sampling CDR with Inverter-Based Frequency Multiplier and Embedded 1:3 DEMUX in 65-nm CMOS
2024· 2 cited
A 1-V 3.9–5.2-GHz reference-sampling PLL with 168-fsrms integrated jitter and −76-dBc reference spur
Microelectronics Journal·2024· 4 cited
A 0.1-to-4.3-GHz Variable-Gain Balun LNA With Dual-Path Noise-Canceling Technique
IEEE Transactions on Microwave Theory and Techniques·2024· 7 cited
A 30.5-to-31 GHz Sampling PLL With Double-Edge Sampling PD and Implict Common-Mode VCO Scoring 39.69-fs RMS Jitter and -253.6-dB FoM in a 0.047mm<sup>2</sup> Area
2024· 1 cited
A low-noise, 0.05–17.8-GHz fractional-N phase-locked loop with two parallel synchronized dual-core voltage-controlled oscillators
Microelectronics Journal·2024· 8 cited
A 39 GHz Doherty-Like Power Amplifier With 22dBm Output Power and 21% Power-Added Efficiency at 6dB Power Back-Off
IEEE Journal on Emerging and Selected Topics in Circuits and Systems·2024· 14 cited
A wideband low power RF Receiver Front-End for Internet-of-Things applications
Microelectronics Journal·2023· 4 cited
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Frequent Co-authors

Ruixue Ding(22), Shubin Liu(18), Zhangming Zhu(15), Feng Bu(13), Xiaoteng Zhao(11), Jinsheng Zhang(10), Rong Zhou(9), Yuan Gao(9), Lianxi Liu(7), Zhicheng Dong(5), Lisheng Chen(4), Jinyou Kang(4), Hongzhi Liang(3), Ruiqing Wang(3), Ge Wang(3), Peiyu Dong(2), Junjie Wu(2), Heng Zhang(2), Yu Cai(2), Tongyan Sun(2)