Abhishek Arun

Microsoft (United Kingdom) — United Kingdom

Computer Science · Physical Sciences

8h-index242citations39works0.02yr avg
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Research Topics

Topic Modeling(10), Natural Language Processing Techniques(10), VLSI and Analog Circuit Testing(10), Integrated Circuits and Semiconductor Failure Analysis(8), Advancements in Semiconductor Devices and Circuit Design(5)

Publications39 total

A high performance approach to ensure image security during transmission
Results in Engineering·2025Open Access
Ensemble Learning Framework for Phishing URL Detection and Leveraging LLMs for Explainability
2025
Compliant Personalization for Recommended Documents in Microsoft 365 with L-Profile as an Exemplary Feature
2025
A High Performance Approach to Ensure Image Security During Transmission
SSRN Electronic Journal·2025Open Access
Retraction Note: An optimal approach to detect retinal diseases by performing segmentation of retinal blood vessels using image processing
Soft Computing·2024Open Access
RETRACTED: Intelligent fuzzy edge computing for real-time decision making in IoT-based digital twin environments
Journal of Intelligent & Fuzzy Systems·2023· 2 cited
Ethical Considerations for Wearable Sensors and AI Algorithms
Advances in computational intelligence and robotics book series·2023· 2 cited
RETRACTED ARTICLE: An optimal approach to detect retinal diseases by performing segmentation of retinal blood vessels using image processing
Soft Computing·2023· 5 cited
VLSI architecture of binary encoding technique for fast motion estimation based on Hamming distances
The Journal of Supercomputing·2018· 1 cited
Design and Implementation of FIR Filter Architecture Using High Level Transformation Techniques
Indian Journal of Science and Technology·2018· 6 citedOpen Access
Implementation of Optimal Binary Encoding Scheme for Accurate Fast Motion Estimation Based on Hamming Distances
Journal of Computational and Theoretical Nanoscience·2017· 1 cited
Perils of power prediction in early power-integrity analysis
2014· 1 cited
Verification Methodology of Heterogeneous DSP+ARM Multicore Processors for Multi-core System on Chip
2013
State Retention Validation of C66X DSP Core
2013
Staggered Core Activation: A circuit/architectural approach for mitigating resonant supply noise issues in multi-core multi-power domain processors
2012· 8 cited
SampleRank Training for Phrase-Based Machine Translation
Edinburgh Research Explorer (University of Edinburgh)·2011· 11 citedOpen Access
Probabilistic Inference for Phrase-based Machine Translation: A Sampling Approach
ERA·2011Open Access
A Unified Approach to Minimum Risk Training and Decoding
Edinburgh Research Explorer (University of Edinburgh)·2010· 10 citedOpen Access
Monte Carlo techniques for phrase-based translation
Machine Translation·2010· 13 cited
A Novel Architecture Based DWT with Folded and Pipelined Schemes for Infrasound Signal Classification
International Journal of MC Square Scientific Research·2009· 2 citedOpen Access
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Frequent Co-authors

Hans G. Kerkhoff(10), Philipp Koehn(7), Marcel H.H. Weusthof(5), Barry Haddow(4), J. Sreemathy(3), Hieu Hoang(2), Chris Dyer(2), Phil Blunsom(2), Adam Lopez(2), Amittai Axelrod(2), Chris Callison-Burch(2), Miles Osborne(2), David Talbot(2), M. Aruna(2), P. Vigneshwaran(2), M. Devaraju(2), Charvi Upreti(2), H.J. Vermaak(2), O. Petre(2), R. Venkatasubramanian(2)