Jae Sung Sim

Seoul National University — South Korea

Engineering · Physical Sciences

9h-index387citations26works0.02yr avg
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Research Topics

Semiconductor materials and devices(21), Advancements in Semiconductor Devices and Circuit Design(11), Quantum and electron transport phenomena(6), Advanced Memory and Neural Computing(6), Advanced Data Storage Technologies(4)

Publications26 total

Understanding Audio-Text Retrieval Through Singular Value Decomposition
2025Open Access
A Study on the Importance of Factors Influencing Land Investment Determination
Korea Real Estate Society·2023
Intrinsic fluctuations in Vertical NAND flash memories
2012· 49 cited
Observation and Effective Suppression of Dielectric Relaxation in Charge-Trap NAND Flash Memory
2011
Multilevel Data Storage Memory Devices Based on the Controlled Capacitive Coupling of Trapped Electrons
Advanced Materials·2011· 82 cited
Programming disturbance and cell scaling in phase change memory: For up to 16nm based 4F<sup>2</sup> cell
2010· 27 cited
Reliability Characteristics of TANOS (TaN/AlO/SiN/Oxide/Si)NAND Flash Memory with Rounded Corner (RC) Structure
2008· 8 cited
Self Aligned Trap-Shallow Trench Isolation Scheme for the Reliability of TANOS (TaN/AlO/SiN/Oxide/Si) NAND Flash Memory
2007· 8 cited
Design and optimization of two-bit double-gate nonvolatile memory cell for highly reliable operation
IEEE Transactions on Nanotechnology·2006· 15 cited
Investigation of the Deposition Behavior of a Lead Oxide Thin Film on Ir Substrates by Liquid Delivery Metallorganic Chemical Vapor Deposition
Electrochemical and Solid-State Letters·2006· 9 citedOpen Access
BAVI-cell: a novel high-speed 50 nm SONOS memory with band-to-band tunneling initiated avalanche injection mechanism
2005· 5 cited
SET/CMOS Hybrid Process and Multiband Filtering Circuits
IEEE Transactions on Electron Devices·2005· 14 cited
Complementary Self-Biased Logics Based on Single-Electron Transistor (SET)/CMOS Hybrid Process
Japanese Journal of Applied Physics·2005· 4 cited
Publisher’s Note: “Charge decay characteristics of silicon-oxide-nitride-oxide-silicon structure at elevated temperatures and extraction of the nitride trap density distribution” [Appl. Phys. Lett. 85, 660 (2004)]
Applied Physics Letters·2004· 1 citedOpen Access
The simulation of single-charging effects in the programming characteristics of nanocrystal memories
Nanotechnology·2004· 7 cited
Charge decay characteristics of silicon-oxide-nitride-oxide-silicon structure at elevated temperatures and extraction of the nitride trap density distribution
Applied Physics Letters·2004· 58 cited
Excellent 2-bit silicon-oxide-nitride-oxide-silicon(SONOS) memory (TSM) with a 90-nm merged-triple gate
2004· 1 cited
Scalable 2-bit silicon–oxide–nitride–oxide–silicon (SONOS) memory with physically separated local nitrides under a merged gate
Solid-State Electronics·2004· 5 cited
Monte Carlo Simulation of Single-Electron Nanocrystal Memories
Japanese Journal of Applied Physics·2004· 4 cited
Realistic single-electron transistor modeling and novel CMOS/SET hybrid circuits
2004· 8 cited
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Frequent Co-authors

Byung‐Gook Park(10), Jong Duk Lee(8), Tae Hun Kim(4), Yong Kyu Lee(4), Chilhee Chung(3), Suk Kang Sung(3), Young-Wug Kim(3), Ki‐Whan Song(3), Changseok Kang(3), Young‐Woo Park(3), Jintaek Park(3), Ki Whan Song(3), Jihye Kong(3), Hyung Cheol Shin(2), Jeong-Hyuk Choi(2), Inho Nam(2), Sung In Hong(2), Kwang-Pyuk Suh(2), Kyung Rok Kim(2), Sanghun Jeon(2)