Yung Feng Cheng

United Microelectronics (Taiwan) — Taiwan

Engineering · Physical Sciences

2h-index13citations16works0.02yr avg
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Research Topics

Advancements in Photolithography Techniques(16), Industrial Vision Systems and Defect Detection(7), Advanced Surface Polishing Techniques(6), 3D IC and TSV technologies(6), Integrated Circuits and Semiconductor Failure Analysis(3)

Publications16 total

Practical lithography hotspot identification using mask process model
2019
Mask process correction for optical weak pattern improvement
2019
Pattern environment impact on wafer of metal layers with high-NA process on advanced node
Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE·2014
In-die mask registration measurement on 28nm-node and beyond
Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE·2013· 3 cited
Studies of a suitable mask error enhancement factor for 2D patterns
Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE·2013· 1 cited
The studies of SMO process on cont layer of 20nm node
Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE·2013· 2 cited
Influence of SRAF size on main feature CD variation on advanced node
Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE·2012
The influence and improvement of through pellicle image placement
Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE·2011
Wafer LMC accuracy improvement by adding mask model
Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE·2010
Feasibility study of splitting pitch technology on 45nm contact patterning with 0.93 NA
Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE·2007
Feasibility study of 45nm metal patterning with 0.93 NA
Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE·2007· 1 cited
Scatterometry measurements of line end shortening structures for focus-exposure monitoring
Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE·2006· 4 cited
The investigation of 193nm CPL 3D topology mask effect on wafer process performance
Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE·2006· 1 cited
Study of effects of sidewall angle on process window using 193nm CPL masks in a 300mm wafer manufacturing environment
Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE·2005· 1 cited
Inspection of integrated circuit database through reticle and wafer simulation: the lithography process window performance monitoring
Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE·2005
Feasibility study of sub-65nm contact/hole patterning
Optical Microlithography XVIII·2005

Frequent Co-authors

Ming Jui Chen(7), Yueh Lin Chou(5), Wei Lo(4), Chuen Huei Yang(4), Chain Ting Huang(3), Pai Chi Chen(2), Shang Feng Weng(2), Kelvin Hung(1), Jie Sun(1), Benjamin Lin(1), Steven Fu(1), Thaddeus G. Dziura(1), Marcelo Cusacovich(1), W. D. Mieher(1), Shen Hung Chen(1), Chia‐Chi Lin(1), Peter Huang(1), Chih I Wei(1), Ya Ching Hou(1), Bo Lü(1)