Shivam Priyadarshi

Applied Photonics (United Kingdom) — United Kingdom

Engineering · Physical Sciences

7h-index115citations20works0.52yr avg
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Research Topics

3D IC and TSV technologies(10), Semiconductor materials and devices(7), Advancements in Semiconductor Devices and Circuit Design(5), Low-power high-performance VLSI design(4), Parallel Computing and Optimization Techniques(3)

Publications20 total

Unlocking the Potential of Co-Packaged Optics in AI and HPC: Opportunities and Challenges
IEEE Communications Magazine·2025
Advancing AI Scalability and Performance with Optical Interconnects
IEEE Communications Magazine·2025· 1 cited
Catena: A Near-Threshold, Sub-0.4-mW, 16-Core Programmable Spatial Array Accelerator for the Ultralow-Power Mobile and Embedded Internet of Things
IEEE Journal of Solid-State Circuits·2020· 21 cited
Catena: A 0.5-V Sub-0.4-mW 16-Core Spatial Array Accelerator for Mobile and Embedded Computing
2019· 8 cited
Electrothermal Simulation of Three-Dimensional Integrated Circuits
2018
Thermal Pathfinding for 3-D ICs
IEEE Transactions on Components Packaging and Manufacturing Technology·2014· 7 cited
Pathfinder3D: A framework for exploring early thermal tradeoffs in 3DIC
2014· 4 cited
Applications and design styles for 3DIC
2013· 2 cited
System and Gate-level Dynamic Electrothermal Simulation of Three Dimensional Integrated Circuits.
NCSU Libraries Repository (North Carolina State University Libraries)·2013· 4 citedOpen Access
Exploring early design tradeoffs in 3DIC
2013· 2 cited
Hetero<sup>2</sup> 3D integration: A scheme for optimizing efficiency/cost of Chip Multiprocessors
2013· 4 cited
Parallel Transient Simulation of Multiphysics Circuits Using Delay-Based Partitioning
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems·2012· 5 cited
Junction-Level Thermal Analysis of 3-D Integrated Circuits Using High Definition Power Blurring
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems·2012· 23 cited
Dynamic electrothermal simulation of three-dimensional integrated circuits using standard cell macromodels
IET Circuits Devices & Systems·2012· 9 cited
A Transient Electrothermal Analysis of Three-Dimensional Integrated Circuits
IEEE Transactions on Components Packaging and Manufacturing Technology·2012· 10 cited
Coordinating 3D designs: Interface IP, standards or free form?
2012· 1 cited
Pathfinder 3D: A flow for system-level design space exploration
2012· 10 cited
SPICE-compatible physical model of nanocrystal floating gate devices for circuit simulation
IET Circuits Devices & Systems·2011· 2 cited
Dynamic Electrothermal Simulation using Compact Macromodel of Standard Cells.
NCSU Libraries Repository (North Carolina State University Libraries)·2010· 2 citedOpen Access
Fast dynamic simulation of VLSI circuits using reduced order compact macromodel of standard cells
2010

Frequent Co-authors

Paul D. Franzon(13), W. Rhett Davis(12), M.B. Steer(7), Samson Melamed(4), T. Robert Harris(4), Nikhil M. Kriplani(4), Joao Pedro Cerqueira(2), Thomas J. Repetti(2), Yu Pu(2), Martha A. Kim(2), Mingoo Seok(2), Jianchen Hu(2), Rajit Manohar(2), Brandon H. Dwiel(2), Eric Rotenberg(2), S. Lipa(2), Thorlindur Thorolfsson(1), Won Ha Choi(1), Xi Chen(1), Carlos Ortega(1)