Shih‐Lien L. Lu

Taiwan Semiconductor Manufacturing Company (Taiwan) — Taiwan

Computer Science · Physical Sciences

10h-index903citations22works0.02yr avg
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Research Topics

Parallel Computing and Optimization Techniques(9), Low-power high-performance VLSI design(6), Semiconductor materials and devices(6), Radiation Effects in Electronics(5), VLSI and Analog Circuit Testing(5)

Publications22 total

A High Performance, Low Energy, Compact Masked 128-Bit AES in 22nm CMOS Technology
2019· 7 cited
Guest Editors’ Introduction: Intelligent Resource-Constrained Sensor Nodes
IEEE Design and Test·2019Open Access
PARTAGE DE CHEMIN DE DONNÉES DE DRAM VIA UN BUS DE DONNÉES GLOBAL SEGMENTÉ
2017
DESIGN OF A LOW LATENCY ASYNCHRONOUS ADDER USING EARLY COMPLETION DETECTION
SHILAP Revista de lepidopterología·2014· 6 citedOpen Access
All-Digital Circuit-Level Dynamic Variation Monitor for Silicon Debug and Adaptive Clock Control
IEEE Transactions on Circuits and Systems I Regular Papers·2011· 36 cited
Integrating formal verification and high-level processor pipeline synthesis
2011· 2 cited
Tunable Replica Bits for Dynamic Variation Tolerance in 8T SRAM Arrays
IEEE Journal of Solid-State Circuits·2011· 21 cited
Automatic Pipelining From Transactional Datapath Specifications
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems·2011· 27 cited
A 45 nm Resilient Microprocessor Core for Dynamic Variation Tolerance
IEEE Journal of Solid-State Circuits·2010· 259 cited
Resilient microprocessor design for high performance & energy efficiency
2010· 1 cited
Automatic multithreaded pipeline synthesis from transactional datapath specifications
2010· 14 cited
Automatic pipelining from transactional datapath specifications
Design, Automation, and Test in Europe·2010· 8 cited
Automatic pipelining from transactional datapath specifications
2010· 5 cited
Low-power Ternary Content Addressable Memory (TCAM) array for network applications
2009· 5 cited
Energy-Efficient and Metastability-Immune Resilient Circuits for Dynamic Variation Tolerance
IEEE Journal of Solid-State Circuits·2009· 337 cited
Content Addressable Memory for Low-Power and High-Performance Applications
2009· 8 cited
Energy-efficient and metastability-immune timing-error detection and recovery circuits for dynamic variation tolerance
2008· 24 cited
A Desktop Computer with a Reconfigurable Pentium®
ACM Transactions on Reconfigurable Technology and Systems·2008· 9 cited
Energy-Efficient and Metastability-Immune Timing-Error Detection and Instruction-Replay-Based Recovery Circuits for Dynamic-Variation Tolerance
2008· 84 cited
An FPGA-based Pentium® in a complete desktop system
2007· 38 cited
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Frequent Co-authors

Keith Bowman(7), James Tschanz(7), Tanay Karnik(7), Vivek De(7), Bibiche Geuskens(6), Eriko Nurvitadhi(6), Chris Wilkerson(5), Arijit Raychowdhury(5), Timothy Kam(5), Muhammad Khellah(4), James C. Hoe(4), Nam Sung Kim(3), Janice C. Lee(3), Paolo Aseron(3), Carlos Tokunaga(3), Peter Yiannacouras(2), Rolf Kassa(2), Michael Konow(2), Taeweon Suh(2), Ataur R. Patwary(2)