N. Thomas

Engineering · Physical Sciences

16h-index922citations63works0.22yr avg
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Research Topics

Semiconductor materials and devices(24), Advancements in Semiconductor Devices and Circuit Design(13), Diamond and Carbon-based Materials Research(11), Semiconductor Quantum Structures and Devices(8), Photonic and Optical Devices(8)

Publications63 total

Room-Temperature Detection of a Single 19 nm Super-Paramagnetic Nanoparticle with an Imaging Magnetometer
2026
An alternative pocket for binding the N‐degrons by the <scp>UBR1</scp> and <scp>UBR2</scp> ubiquitin <scp>E3</scp> ligases
Protein Science·2025Open Access
Stress in Single- and Multiribbon Complementary FETs (CFETs): Evolution in Process Flow and Impact on Drive Current
IEEE Transactions on Electron Devices·2025
Evaluating annotated bibliographies in a first-year writing and rhetoric course based off 4-weeks of scaffolded instruction
College & Undergraduate Libraries·2025
Sputter-Deposited copper iodide thin film transistors with low Operating voltage
Solid-State Electronics·2024· 1 cited
Modifications to the soft-walled Thomas trap
Pacific Conservation Biology·2024Open Access
Demonstration of a Stacked CMOS Inverter at 60nm Gate Pitch with Power Via and Direct Backside Device Contacts
2023· 30 cited
A Fully Integrated 3.2-4.7GHz Doherty Power Amplifier in 300mm GaN-on-Si Technology
2022· 9 cited
Advanced Scaling of Enhancement Mode High-K Gallium Nitride-on-300mm-Si(111) Transistor and 3D Layer Transfer GaN-Silicon Finfet CMOS Integration
2021 IEEE International Electron Devices Meeting (IEDM)·2021· 55 cited
Opportunities in 3-D stacked CMOS transistors
2021 IEEE International Electron Devices Meeting (IEDM)·2021· 24 cited
Advances in Research on 300mm Gallium Nitride-on-Si(111) NMOS Transistor and Silicon CMOS Integration
2020· 20 cited
3-D Self-aligned Stacked NMOS-on-PMOS Nanoribbon Transistors for Continued Moore’s Law Scaling
2020· 106 cited
Gallium Nitride and Silicon Transistors on 300 mm Silicon Wafers Enabled by 3-D Monolithic Heterogeneous Integration
IEEE Transactions on Electron Devices·2020· 64 cited
GaN and Si Transistors on 300mm Si(111) Enabled by 3D Monolithic Heterogeneous Integration
2020· 24 cited
Erratum: “The critical role of substrate disorder in valley splitting in Si quantum wells” [Appl. Phys. Lett. <b>112</b>, 243107 (2018)]
Applied Physics Letters·2020Open Access
3D heterogeneous integration of high performance high-K metal gate GaN NMOS and Si PMOS transistors on 300mm high-resistivity Si substrate for energy-efficient and compact power delivery, RF (5G and beyond) and SoC applications
2019· 99 cited
High Volume Electrical Characterization of Semiconductor Qubits
2019· 30 citedOpen Access
Full 300mm fin based QD device characterization
Bulletin of the American Physical Society·2019
Qubit Device Integration Using Advanced Semiconductor Manufacturing Process Technology
2018· 35 cited
Wafer-scale silicon for quantum computing
arXiv (Cornell University)·2018Open Access
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Frequent Co-authors

M. Radosavljević(10), Han Wui Then(7), Ilkka Lähdesmäki(6), Kai‐Mei C. Fu(6), Babak A. Parviz(5), B. Krist(5), A. Oni(5), Tushar K. Talukdar(5), Pratik Koirala(5), Yuncheng Song(5), Minjoo Larry Lee(5), Payam Amin(5), Lieven M. K. Vandersypen(5), James S. Clarke(5), R. Madar(5), C. Bérnard(5), K. Jun(4), Thoe K. Michaelos(4), R. James Barbour(4), Hubert C. George(4)