Seung Ho Shin

Yonsei University — South Korea

Computer Science · Physical Sciences

3h-index38citations29works0.62yr avg
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Research Topics

VLSI and Analog Circuit Testing(11), Semiconductor materials and devices(6), Wave and Wind Energy Systems(5), Parallel Computing and Optimization Techniques(4), Advanced Data Storage Technologies(4)

Publications29 total

High-Speed Redundancy Analysis for Complex Spare Structures
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems·2026
A Low Area Built-In Self-Repair Using Hybrid Fault Address Memory for HBM
IEEE Transactions on Very Large Scale Integration (VLSI) Systems·2025
A Design for Tolerating Multiple Faults in Processing-in-Memory
2025
A Broadcast-Based Fully Parallel Test Architecture for Processing-in-Memory
2025
STAR-PIM: Self-Test and Repair Structure for Processing-in-Memory With Adder Tree-Based MAC
IEEE Transactions on Circuits and Systems I Regular Papers·2025· 1 cited
A Novel CNN-Based Redundancy Analysis Using Parallel Solution Decision
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems·2025
RAPID: Redundancy Analysis With Parallelized and Intelligent Distribution
IEEE Access·2024Open Access
A Built-In Self-Repair With Maximum Fault Collection and Fast Analysis Method for HBM
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems·2024· 2 cited
Effective Parallel Redundancy Analysis Using GPU for Memory Repair
IEEE Transactions on Very Large Scale Integration (VLSI) Systems·2024· 1 cited
Effective Data-Width Aware ECC Scheme for HBM
2024
GRAP: Efficient GPU-Based Redundancy Analysis Using Parallel Evaluation for Cross Faults
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems·2024· 3 cited
Redundancy Analysis Simplification Scheme for High-Speed Memory Repair
2023· 1 cited
GPU-Based Redundancy Analysis using Partitioning Method for Memory Repair
2023
TRUST: Through-Silicon via Repair Using Switch Matrix Topology
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems·2022· 7 cited
An Improved Early Termination Methodology Using Convolutional Neural Network
2022 19th International SoC Design Conference (ISOCC)·2022· 1 cited
FAME: Fault Address Memory Structure for Repair Time Reduction
2022 19th International SoC Design Conference (ISOCC)·2022
PROG: Per-Row Output Generator for BOST
2022 19th International SoC Design Conference (ISOCC)·2022
ECMO: ECC Architecture Reusing Content-Addressable Memories for Obtaining High Reliability in DRAM
IEEE Transactions on Very Large Scale Integration (VLSI) Systems·2022· 11 cited
Post-bond Repair of Line Faults with Double-bit ECC for 3D Memory
2021
An Effective Spare Allocation Methodology for 3D Memory Repair with BIRA
2021· 2 cited
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Frequent Co-authors

Hayoung Lee(15), Sungho Kang(15), Younwoo Yoo(12), Youngki Moon(5), Sooryeong Lee(3), Ji Yong Park(2), Bo Woo Nam(2), J.Y. Park(2), Soo Young Hong(2), Byungsoo Kim(2), Eugene Jeong(2), Sungho Kang(2), Jung Min Sohn(1), Keyyong Hong(1), Chang Hyuck Lim(1), Jong Su Choi(1), Ho Jeong Cheon(1), Sa Young Hong(1), J. Yoon(1), Nak‐Hoon Son(1)