James E. Stine

Oklahoma State University — United States

Engineering · Physical Sciences

18h-index1.8kcitations124works0.52yr avg
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Research Topics

Low-power high-performance VLSI design(67), Numerical Methods and Algorithms(55), Parallel Computing and Optimization Techniques(34), Analog and Mixed-Signal Circuit Design(20), VLSI and FPGA Design Techniques(19)

Publications124 total

RISC-V System-on-Chip Design Textbook and Course
2025
BOARD # 297: RET: Acquisition and Retainment of Semiconductor Knowledge among K-12 STEM Teachers
2025
Alchemy : A Methodology for Scalable RTL Design Space Exploration
2025Open Access
Design of a Robust IEEE Compliant Floating - Point Divide and Square Root Using Iterative Approximation
2025
Stixu: An Open-Source Idea for Planning Integrated Circuit Layouts Efficiently
2024
Shared Recurrence Floating-Point Divide/Sqrt and Integer Divide/Remainder With Early Termination
IEEE Transactions on Computers·2024
Power Reduction of Montgomery Multiplication Architectures Using Clock Gating
2024· 1 cited
CharLib: An Open Source Standard Cell Library Characterizer
2024· 2 cited
Board 422: What Does It Take to Implement a Semiconductor Curriculum in High School? True Challenges and The Teachers’ Perspectives
2024Open Access
Research Experiences for Teachers on Chip Design
2024· 1 cited
Methodologies for Implementation of Standard-Cell Libraries for Radiation Hardened Environments
2024· 2 cited
NSF Integrated Circuit Research, Education and Workforce Development Workshop Final Report
arXiv (Cornell University)·2023Open Access
Parallelization of the Shift and Add Reducer
2023· 1 cited
Design Exploration of Magnitude Comparators for RISC-V System-on-Chip Architectures
2023
Unified Digit Selection for Radix-4 Recurrence Division and Square Root
IEEE Transactions on Computers·2023· 1 cited
Evaluation of a Modular Approach to AES Hardware Architecture and Optimization
Journal of Signal Processing Systems·2023· 6 cited
Point-Targeted Sparseness and Ling Transforms on Parallel Prefix Adder Trees
2022· 2 cited
Implementation of High Performance IEEE 754-Posit Conversion Hardware
2022 IEEE International Symposium on Circuits and Systems (ISCAS)·2022· 2 cited
A Reconfigurable Architecture for Improvement and Optimization of Advanced Encryption Standard Hardware
2021 55th Asilomar Conference on Signals, Systems, and Computers·2021· 4 cited
A Comprehensive Exploration of the Parallel Prefix Adder Tree Space
2021· 7 cited
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Frequent Co-authors

Michael Schulte(7), Samira Ataei(6), Michael Schulte(6), Ivan D. Castellanos(5), J. Grad(4), Matthew R. Guthaus(3), K.E. Wires(3), Masoud Sadeghian(3), Bin Wu(2), Vibhuti Dave(2), Nick Iliev(2), N. Jachimiec(2), Son Bui(2), Jun Chen(2), Ryan Swann(2), Michael Wood(1), Jeff Henson(1), Fred Love(1), W. Rhett Davis(1), Paul D. Franzon(1)