Ivan D. Castellanos

Engineering · Physical Sciences

5h-index519citations9works0.02yr avg
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Research Topics

Low-power high-performance VLSI design(4), Numerical Methods and Algorithms(4), Parallel Computing and Optimization Techniques(3), VLSI and FPGA Design Techniques(3), VLSI and Analog Circuit Testing(2)

Publications9 total

Efficient Algorithm for δ-Approximate Jumbled Pattern Matching.
Prague Stringology Conference·2015
Analysis and implementation of decimal arithmetic hardware in nanometer CMOS technology
SHAREOK (University of Oklahoma)·2013Open Access
FreePDK v2.0: Transitioning VLSI education towards nanometer variation-aware designs
2009· 21 cited
Decimal partial product generation architectures
2008· 5 cited
Compressor trees for decimal partial product reduction
2008· 23 cited
FreePDK: An Open-Source Variation-Aware Design Kit
2007· 416 cited
A Framework for High-Level Synthesis of System-on-Chip Designs
2006· 50 cited
A 64-bit Decimal Floating-Point Comparator
2006· 2 cited
Experiments for Decimal Floating-Point Division by Recurrence
2006· 2 cited

Frequent Co-authors

James E. Stine(7), Michael Wood(1), Jeff Henson(1), Fred Love(1), W. Rhett Davis(1), Paul D. Franzon(1), Michael Bucher(1), Sunil Basavarajaiah(1), Julie Oh(1), Ravi Jenkal(1), J. Grad(1), John Blank(1), Vibhuti Dave(1), M. Durga Prakash(1), Nick Iliev(1), N. Jachimiec(1), Jun Chen(1), Gopalakrishnan Sundararajan(1), Mohammad Qayam(1), Praveen Kumar(1)