K. Mistry

Intel (United States) — United States

Engineering · Physical Sciences

30h-index6.3kcitations77works2.72yr avg
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Research Topics

Semiconductor materials and devices(68), Advancements in Semiconductor Devices and Circuit Design(68), Integrated Circuits and Semiconductor Failure Analysis(25), Ferroelectric and Negative Capacitance Devices(10), Silicon Carbide Semiconductor Technologies(9)

Publications77 total

AI Agents for Photonic Integrated Circuit Design Automation
arXiv (Cornell University)·2025Open Access
Intel 18A Platform Technology Featuring RibbonFET (GAA) and PowerVia for Advanced High-Performance Computing
2025· 5 cited
Small-Scale Green Food Retailers' Performance as Green Retailers in the Twin City Region of Telangana
International Journal of Advance Research and Innovation·2025Open Access
IoT wearables in child health: A comprehensive scoping review and exploration of ubiquitous computing
Internet of Things·2025· 6 citedOpen Access
An Intel 3 Advanced FinFET Platform Technology for High Performance Computing and SOC Product Applications
2024· 5 cited
Perspectives on Backside Power (PowerVia)
2024
Hybrid Educational Environments – Using IoT to detect emotion changes during student interactions
Interaction design & architecture(s)/ID&A Interaction design & architecture(s)·2023· 4 citedOpen Access
E-Core Implementation in Intel 4 with PowerVia (Backside Power) Technology
2023· 24 cited
Technology Evening Panel Discussion What Will the Foundries of the Future Do?
2019Open Access
Bias temperature instability variation on SiON/Poly, HK/MG and trigate architectures
2014· 45 cited
Self-heat reliability considerations on Intel's 22nm Tri-Gate technology
2013· 84 cited
Low-k interconnect stack with metal-insulator-metal capacitors for 22nm high volume manufacturing
2012· 49 cited
A 22nm high performance and low-power CMOS technology featuring fully-depleted tri-gate transistors, self-aligned contacts and high density MIM capacitors
2012· 749 cited
Reliability studies on a 45nm low power system-on-chip (SoC) dual gate oxide high-k / metal gate (DG HK+MG) technology
2010· 6 cited
Future device scaling - Beyond traditional CMOS
2009· 1 cited
Characterization of SILC and its end-of-life reliability assessment on 45NM high-K and metal-gate technology
IEEE International Reliability Physics Symposium proceedings·2009· 13 cited
A 45nm low power system-on-chip technology with dual gate (logic and I/O) high-k/metal gate strained silicon transistors
2008· 45 cited
45nm High-k + metal gate strain-enhanced transistors
2008· 204 cited
Dielectric breakdown in a 45 nm high-k/metal gate process technology
2008· 26 cited
BTI reliability of 45 nm high-K + metal-gate process technology
2008· 130 cited
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Frequent Co-authors

T. Ghani(19), B.S. Doyle(14), C. Auth(13), J. Hicks(10), M. Bohr(10), Scott E. Thompson(9), J. Sandford(8), S. Tyagi(8), Kelin J. Kuhn(7), B. McIntyre(7), L. Shifren(7), M Armstrong(7), P. Packan(7), R. Chau(6), Markus J. Buehler(6), S. Cea(6), M. Hattendorf(5), C. Kenyon(5), Sangwoo Pae(5), S. Sivakumar(5)