H. Mori

NEC (United Kingdom) — United Kingdom

Engineering · Physical Sciences

3h-index165citations8works0.02yr avg
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Research Topics

Low-power high-performance VLSI design(5), Semiconductor materials and devices(5), Advancements in Semiconductor Devices and Circuit Design(4), VLSI and FPGA Design Techniques(2), Advanced Graph Theory Research(1)

Publications8 total

One-dimensional logic gate assignment and interval graphs
2005· 3 cited
A 0.23 μm/sup 2/ double self-aligned contact cell for gigabit DRAMs with a Ge-added vertical epitaxial Si pad
2002· 2 cited
A self-aligned contact technology using anisotropical selective epitaxial silicon for giga-bit DRAMs
2002· 3 cited
A 1 Gb DRAM for file applications
2002· 23 cited
FA 14.6: A iGb DRAM for File Applications
1995
A 1-Gb DRAM for file applications
IEEE Journal of Solid-State Circuits·1995· 24 cited
AI APPROACH TO VLSI ROUTING PROBLEM.
1984· 3 cited
One-dimensional logic gate assignment and interval graphs
IEEE Transactions on Circuits and Systems·1979· 107 cited

Frequent Co-authors

S. Iwao(5), K. Koyama(4), Tadahiko Sugibayashi(3), Kentaro Shibahara(3), Ryuichi Oikawa(3), T. Murotani(3), Shin‐ichi Fukuzawa(3), Toshiro Itani(3), Kunihiko Kasama(3), S. Ohya(3), Tomi Ohtsuki(2), E.S. Kuh(2), Toshinobu Kashiwabara(2), T. Fujisawa(2), I. Naritake(2), Satoru Utsugi(2), T. Okuda(2), Makoto Ogawa(2), H. Hada(2), T. Tatsumi(2)