John W. Poulton

Nvidia (United States) — United States

Engineering · Physical Sciences

28h-index3.8kcitations82works5.02yr avg
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Research Topics

Advancements in PLL and VCO Technologies(30), Radio Frequency Integrated Circuit Design(14), Photonic and Optical Devices(13), Semiconductor Lasers and Optical Devices(13), Computer Graphics and Visualization Techniques(12)

Publications82 total

Leveraging Micro-Bump Pitch Scaling to Accelerate Interposer Link Bandwidths for Future High-Performance Compute Applications
2024· 5 cited
A 0.190-pJ/bit 25.2-Gb/s/wire Inverter-Based AC-Coupled Transceiver for Short-Reach Die-to-Die Interfaces in 5-nm CMOS
IEEE Journal of Solid-State Circuits·2023· 9 cited
Pixel-planes 5: A Heterogeneous Multiprocessor Graphics System Using Processor-Enhanced Memories
ACM eBooks·2023· 11 cited
A 0.190-pJ/bit 25.2-Gb/s/wire Inverter-Based AC-Coupled Transceiver for Short-Reach Die-to-Die Interfaces in 5-nm CMOS
2023· 9 cited
A 0.297-pJ/Bit 50.4-Gb/s/Wire Inverter-Based Short-Reach Simultaneous Bi-Directional Transceiver for Die-to-Die Interface in 5-nm CMOS
IEEE Journal of Solid-State Circuits·2023· 45 cited
Author response: Selective endocytosis controls slit diaphragm maintenance and dynamics in Drosophila nephrocytes
2022· 1 citedOpen Access
A 0.297-pJ/bit 50.4-Gb/s/wire Inverter-Based Short-Reach Simultaneous Bidirectional Transceiver for Die-to-Die Interface in 5nm CMOS
2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)·2022· 13 cited
6.6 Reference-Noise Compensation Scheme for Single-Ended Package-to-Package Links
2020· 5 cited
Voltage-Follower Coupling Quadrature Oscillator with Embedded Phase-Interpolator in 16nm FinFET
2019· 1 cited
A 2-to-20 GHz Multi-Phase Clock Generator with Phase Interpolators Using Injection-Locked Oscillation Buffers for High-Speed IOs in 16nm FinFET
2019· 10 cited
Ground-Referenced Single-Ended Signaling: Applications for High-Density, Short-Haul Communication Systems
IEEE Solid-State Circuits Magazine·2019· 8 cited
A 1.17-pJ/b, 25-Gb/s/pin Ground-Referenced Single-Ended Serial Link for Off- and On-Package Communication Using a Process- and Temperature-Adaptive Voltage Regulator
IEEE Journal of Solid-State Circuits·2018· 61 cited
Hardware-Enabled Artificial Intelligence
2018· 31 cited
Ground-referenced signaling for intra-chip and short-reach chip-to-chip interconnects
2018· 28 cited
A switching linear regulator based on a fast-self-clocked comparator with very low probability of meta-stability and a parallel analog ripple control module
2018· 14 cited
A 1.17pJ/b 25Gb/s/pin ground-referenced single-ended serial link for off- and on-package communication in 16nm CMOS using a process- and temperature-adaptive voltage regulator
2018· 42 cited
A 25 Gb/s 470 μW active inductor equalizer for ground referenced signaling receivers
2017· 2 cited
A 256kb 6T self-tuning SRAM with extended 0.38V–1.2V operating range using multiple read/write assists and V<inf>MIN</inf> tracking canary sensors
2017· 2 cited
8.6 A 6.5-to-23.3fJ/b/mm balanced charge-recycling bus in 16nm FinFET CMOS at 1.7-to-2.6Gb/s/wire with clock forwarding and low-crosstalk contraflow wiring
2016· 8 cited
A 28 nm 2 Mbit 6 T SRAM With Highly Configurable Low-Voltage Write-Ability Assist Implementation and Capacitor-Based Sense-Amplifier Input Offset Compensation
IEEE Journal of Solid-State Circuits·2015· 39 cited
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Frequent Co-authors

William J. Dally(27), John Eyles(15), Stephen G. Tell(15), John Wilson(15), C. Thomas Gray(14), Thomas H. Greer(10), Walker J. Turner(9), Brian Zimmer(9), Sanquan Song(9), R. Farjad-Rad(8), Xi Chen(8), Nikola Nedovic(8), Henry Fuchs(7), R. Senthinathan(7), Trey Greer(6), R. Palmer(6), Hiok-Tiaq Ng(6), R. Rathi(6), Jack Goldfeather(5), Andrew M. Fuller(5)