B. Duriez

Commissariat à l'Énergie Atomique et aux Énergies Alternatives — France

Engineering · Physical Sciences

15h-index741citations56works1.42yr avg
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Research Topics

Advancements in Semiconductor Devices and Circuit Design(40), Semiconductor materials and devices(39), Integrated Circuits and Semiconductor Failure Analysis(11), Radio Frequency Integrated Circuit Design(10), Nanowire Synthesis and Applications(8)

Publications56 total

Pursuing the FD-SOI roadmap down to 10 nm and 7 nm nodes for high energy efficient, low power and RF/mmWave applications
Solid-State Electronics·2025· 1 citedOpen Access
Forward gate current modeling of AlGaN/AlN/GaN HEMTs based on Poisson–Schrödinger and direct tunneling equations
APL Electronic Devices·2025· 1 citedOpen Access
Nanoscale SOI strain engineering: STRASS-enabled local stress optimization
Solid-State Electronics·2025
Toward full relaxation of sSOI substrates for PFET device fabrication
Solid-State Electronics·2025· 1 citedOpen Access
Toward Full Relaxation of Ssoi Substrates for Pfet Device Fabrication
SSRN Electronic Journal·2025Open Access
Pursuing the Fd-Soi Roadmap Down to 10-7nm Nodes for High Energy Efficient, Low Power and Rf/Mmwave Applications
SSRN Electronic Journal·2025Open Access
CMOS Compatible 200 mm GaN-on-Si HEMTs for RF Switch Applications with 36 dBm CW Power Handling and 200 FS RonCoff
2024· 3 cited
Fine Characterization and Modeling of the Frequency Dependence of TDDB in RF Domain (F>10GHz)
2024· 1 cited
Advanced SiGe:B Raised Sources and Drains for p-type FD-SOI MOSFETs
ECS Meeting Abstracts·2024
Advanced SiGe:B Raised Sources and Drains for p-type FD-SOI MOSFETs
ECS Transactions·2024· 1 cited
Enhanced RF Switch Performance in RFSOI Technology: Achieving 74 fs R<sub>ON</sub>·C<sub>OFF</sub> and 3.3 V RFV<sub>MAX</sub> on Thinned SOI
2024· 1 cited
A Methodology to Address RF Aging of 40nm CMOS PA Cells Under 5G mmW Modulation Profiles
2024· 2 citedOpen Access
Experimental Analysis and Modeling of Self-Heating and Thermal Coupling in 28 nm FD-SOI CMOS Transistors Down to Cryogenic Temperatures
IEEE Transactions on Electron Devices·2024· 9 cited
Characterization of Silicon Substrates for sub-THz Electronics, Benefit of The Beatty Resonator Test-Structure
2024
6.6W/mm 200mm CMOS compatible AlN/GaN/Si MIS-HEMT with in-situ SiN gate dielectric and low temperature ohmic contacts
2023· 7 citedOpen Access
A cost effective RF-SOI Drain Extended MOS transistor featuring P <sub>SAT</sub> =19dBm @28GHz &amp; V <sub>DD</sub> =3V for 5G Power Amplifier application
2023· 1 cited
Computational model for predicting structural stability and stress transfer of a new SiGe stressor technique for NMOS devices
Solid-State Electronics·2023· 1 cited
40-nm RFSOI technology exhibiting 90fs R<sub>ON</sub> × C<sub>OFF</sub> and f<sub>T</sub>/f<sub>MAX</sub> of 250 GHz/350 GHz targeting sub-6 GHz and mmW 5G applications
2023· 3 cited
Optimizing RFSOI Performance through a T-shaped Gate and Nano-Second Laser Annealing Techniques
2023
Ge CMOS gate stack and contact development for Vertically Stacked Lateral Nanowire FETs
2018· 45 cited
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Frequent Co-authors

G. Vellianitis(19), M.J.H. van Dal(17), G. Doornbos(16), M. Passlack(12), C.H. Diaz(10), F. Arnaud(10), F. Bœuf(9), R. Oxland(9), B. Tavel(8), P.A. Stolk(7), T. Skotnicki(6), M. Bidaud(6), Liesbeth Witters(6), R.J.P. Lander(6), K. Rochereau(6), R. Difrenza(6), Aryan Afzalian(5), Krishna K. Bhuwalka(5), M. Holland(5), P. Gouraud(5)